KR970046892U - 리드온칩 패키지 - Google Patents

리드온칩 패키지

Info

Publication number
KR970046892U
KR970046892U KR2019950042877U KR19950042877U KR970046892U KR 970046892 U KR970046892 U KR 970046892U KR 2019950042877 U KR2019950042877 U KR 2019950042877U KR 19950042877 U KR19950042877 U KR 19950042877U KR 970046892 U KR970046892 U KR 970046892U
Authority
KR
South Korea
Prior art keywords
lead
chip package
package
chip
Prior art date
Application number
KR2019950042877U
Other languages
English (en)
Other versions
KR0135890Y1 (ko
Inventor
고경희
Original Assignee
현대전자산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 현대전자산업주식회사 filed Critical 현대전자산업주식회사
Priority to KR2019950042877U priority Critical patent/KR0135890Y1/ko
Publication of KR970046892U publication Critical patent/KR970046892U/ko
Application granted granted Critical
Publication of KR0135890Y1 publication Critical patent/KR0135890Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR2019950042877U 1995-12-18 1995-12-18 리드온칩 패키지 KR0135890Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019950042877U KR0135890Y1 (ko) 1995-12-18 1995-12-18 리드온칩 패키지

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019950042877U KR0135890Y1 (ko) 1995-12-18 1995-12-18 리드온칩 패키지

Publications (2)

Publication Number Publication Date
KR970046892U true KR970046892U (ko) 1997-07-31
KR0135890Y1 KR0135890Y1 (ko) 1999-02-18

Family

ID=19435174

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019950042877U KR0135890Y1 (ko) 1995-12-18 1995-12-18 리드온칩 패키지

Country Status (1)

Country Link
KR (1) KR0135890Y1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100525091B1 (ko) * 2001-12-28 2005-11-02 주식회사 하이닉스반도체 반도체 패키지

Also Published As

Publication number Publication date
KR0135890Y1 (ko) 1999-02-18

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Legal Events

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E701 Decision to grant or registration of patent right
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Payment date: 20041018

Year of fee payment: 7

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