KR970046890U - 칩 온 보드 반도체 패키지 실장구조 - Google Patents
칩 온 보드 반도체 패키지 실장구조Info
- Publication number
- KR970046890U KR970046890U KR2019950038045U KR19950038045U KR970046890U KR 970046890 U KR970046890 U KR 970046890U KR 2019950038045 U KR2019950038045 U KR 2019950038045U KR 19950038045 U KR19950038045 U KR 19950038045U KR 970046890 U KR970046890 U KR 970046890U
- Authority
- KR
- South Korea
- Prior art keywords
- chip
- mounting structure
- semiconductor package
- package mounting
- board semiconductor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019950038045U KR200148613Y1 (ko) | 1995-12-04 | 1995-12-04 | 칩 온 보드 반도체 패키지 실장구조 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019950038045U KR200148613Y1 (ko) | 1995-12-04 | 1995-12-04 | 칩 온 보드 반도체 패키지 실장구조 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970046890U true KR970046890U (ko) | 1997-07-31 |
KR200148613Y1 KR200148613Y1 (ko) | 1999-06-15 |
Family
ID=19431891
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019950038045U KR200148613Y1 (ko) | 1995-12-04 | 1995-12-04 | 칩 온 보드 반도체 패키지 실장구조 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR200148613Y1 (ko) |
-
1995
- 1995-12-04 KR KR2019950038045U patent/KR200148613Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR200148613Y1 (ko) | 1999-06-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20090223 Year of fee payment: 11 |
|
LAPS | Lapse due to unpaid annual fee |