KR970024893A - Storage device of frame memory and method thereof - Google Patents
Storage device of frame memory and method thereof Download PDFInfo
- Publication number
- KR970024893A KR970024893A KR1019950037435A KR19950037435A KR970024893A KR 970024893 A KR970024893 A KR 970024893A KR 1019950037435 A KR1019950037435 A KR 1019950037435A KR 19950037435 A KR19950037435 A KR 19950037435A KR 970024893 A KR970024893 A KR 970024893A
- Authority
- KR
- South Korea
- Prior art keywords
- frame memory
- signal
- field
- outputting
- address
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/06—Generation of synchronising signals
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
본 발명은 하나의 화상 저장용 프레임 메모리에 두 개의 필드를 구분하여 저장할 수 있는 프레임 메모리 장치 및 그 방법에 관한 것으로서, 프레임 메모리의 필드를 구분하는 필드 구분 신호를 출력하는 동기 신호 발생부; 어드레스 신호를 출력하는 어드레스 발생부; 상기 어드레스 발생부로부터 출력되는 어드레스 신호와 상기 동기 신호발생부로부터 발생되는 필드 구분 신호를 프레임 신호의 제어에 의해 출력하는 멀티플레서; 및 상기 멀티플레서로부터 출력된 신호를 필드 구분 신호에 의해 필드를 구분하여 저장하는 프레임 메모리를 포함한다.The present invention relates to a frame memory device capable of dividing two fields into one image storage frame memory and a method thereof, comprising: a synchronization signal generator for outputting a field separation signal for separating fields of a frame memory; An address generator for outputting an address signal; A multiplexer for outputting an address signal output from the address generator and a field classification signal generated from the synchronization signal generator by control of a frame signal; And a frame memory configured to store the signals output from the multiplexer by dividing the fields by the field separation signals.
따라서, 상술한 바와 같이 본 발명에 따른 프레임 메모리의 저장방법은 필드 구분 신호를 최상위 비트가 제어되므로 프레임 메모리를 절반으로 나누어 사용하므로 프레임 메모리를 효율적으로 저장할 수 있는 효과를 갖는다.Therefore, as described above, the method of storing the frame memory according to the present invention has an effect of efficiently storing the frame memory because the most significant bit is controlled for the field discrimination signal, so that the frame memory is divided in half.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제4도는 본 발명에 의한 프레임 메모리 장치를 나타낸 블록도이다.4 is a block diagram showing a frame memory device according to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950037435A KR0155910B1 (en) | 1995-10-26 | 1995-10-26 | Frame memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950037435A KR0155910B1 (en) | 1995-10-26 | 1995-10-26 | Frame memory |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970024893A true KR970024893A (en) | 1997-05-30 |
KR0155910B1 KR0155910B1 (en) | 1998-11-16 |
Family
ID=19431505
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950037435A KR0155910B1 (en) | 1995-10-26 | 1995-10-26 | Frame memory |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0155910B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20130087119A (en) | 2012-01-27 | 2013-08-06 | 삼성전자주식회사 | Display drive ic |
-
1995
- 1995-10-26 KR KR1019950037435A patent/KR0155910B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0155910B1 (en) | 1998-11-16 |
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