KR970012783A - Shorter test time semiconductor memory device - Google Patents
Shorter test time semiconductor memory device Download PDFInfo
- Publication number
- KR970012783A KR970012783A KR1019950026274A KR19950026274A KR970012783A KR 970012783 A KR970012783 A KR 970012783A KR 1019950026274 A KR1019950026274 A KR 1019950026274A KR 19950026274 A KR19950026274 A KR 19950026274A KR 970012783 A KR970012783 A KR 970012783A
- Authority
- KR
- South Korea
- Prior art keywords
- row address
- signal
- latch unit
- address latch
- row
- Prior art date
Links
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Abstract
본 발명은 반도체 메모리 장치에 관한 것으로서, 특히 복수의 메모리셀 어레이들;' 로우 어드레스 버퍼; 상기 로우 어드레스 버퍼로부터 제공되는 로우 어드레스신호를 디코딩하여 상기 복수의 메모리셀 어레이들의 워드라인을 구동하는 로우 디코더를 구비하는 반도체 메모리 장치에 있어서, 로우 어드레스 버퍼는 로우 어드레스 스트로브 신호에 동기하여 외부의 어드레스신호를 입력하여 래치하는 어드레스 래치부; 어드레스 래치부의 제1출력신호를 래치하는 제1로우 어드레스 래치부; 어드레스 래치부의 제2출력신호를 래치하는 제2로우 어드레스 래치부; 모드선택신호에 응답하여 상기 제1로우 어드레스 래치부의 비반전 로우 어드레스 신호를 선택적으로 출력하는 제1출력 구동부; 및 모드선택신호에 응답하여 상기 제2로우 어드레스 래치부의 반전 로우 어드레스 신호를 선택적으로 출력하는 제2출력 구동부를 구비한다.The present invention relates to a semiconductor memory device, in particular a plurality of memory cell arrays; A row address buffer; 12. A semiconductor memory device having a row decoder for decoding a row address signal provided from the row address buffer to drive word lines of the plurality of memory cell arrays, wherein the row address buffer is an external address in synchronization with a row address strobe signal. An address latch unit for inputting and latching a signal; A first row address latch unit for latching a first output signal of the address latch unit; A second row address latch unit for latching a second output signal of the address latch unit; A first output driver selectively outputting a non-inverting row address signal of the first row address latch unit in response to a mode selection signal; And a second output driver for selectively outputting an inverted row address signal of the second row address latch unit in response to a mode selection signal.
따라서, 테스트 모드에서는 1리프레쉬 사이클에서 복수의 워드라인을 동시에 구동함으로써 테스트 시간을 단축시킬 수 있다.Therefore, in the test mode, the test time can be shortened by simultaneously driving a plurality of word lines in one refresh cycle.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 의한 테스트 시간 단축형 디램의 노말 및 번인 테스트 모드에서의 워드라인 구동상태를 나타낸 도면,2 is a diagram illustrating a word line driving state in a normal and burn-in test mode of a test time reduction DRAM according to the present invention;
제3도는 본 발명에 의한 디램의 테스트 시간 단축을 위한 로우 어드레스 버퍼의 구조를 나타낸 도면.3 is a diagram illustrating a structure of a row address buffer for shortening a test time of a DRAM according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950026274A KR970012783A (en) | 1995-08-24 | 1995-08-24 | Shorter test time semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950026274A KR970012783A (en) | 1995-08-24 | 1995-08-24 | Shorter test time semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970012783A true KR970012783A (en) | 1997-03-29 |
Family
ID=66595934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950026274A KR970012783A (en) | 1995-08-24 | 1995-08-24 | Shorter test time semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970012783A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100420427B1 (en) * | 2001-01-04 | 2004-03-04 | 미쓰비시덴키 가부시키가이샤 | Semiconductor memory device enabling reduction of test time period |
-
1995
- 1995-08-24 KR KR1019950026274A patent/KR970012783A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100420427B1 (en) * | 2001-01-04 | 2004-03-04 | 미쓰비시덴키 가부시키가이샤 | Semiconductor memory device enabling reduction of test time period |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5155705A (en) | Semiconductor memory device having flash write function | |
KR970051182A (en) | Semiconductor memory | |
KR890017706A (en) | Dynamic Semiconductor Memory | |
KR940022581A (en) | Semiconductor memory | |
KR950009279A (en) | Semiconductor memory device performing memory test | |
KR870009384A (en) | Semiconductor memory | |
KR940002865A (en) | Burn-in enable circuit and burn-in test method of semiconductor memory device | |
KR920001552A (en) | Multi-bit parallel test method of semiconductor memory device | |
KR940016225A (en) | Semiconductor memory | |
KR950015399A (en) | Semiconductor memory device for input and output of bit unit data | |
US5936910A (en) | Semiconductor memory device having burn-in test function | |
KR970023464A (en) | Semiconductor memory with test circuit | |
KR970012701A (en) | Word line sequential control semiconductor memory device | |
KR940016263A (en) | Semiconductor memory device | |
KR960042367A (en) | Memory cell access method and access circuit of memory device | |
KR960025777A (en) | Semiconductor Memory Device With Precharge Circuit | |
KR900005454A (en) | Serial I / O Semiconductor Memory | |
KR900002307A (en) | Dynamic random access memory | |
KR900002305A (en) | Semiconductor memory | |
KR970012783A (en) | Shorter test time semiconductor memory device | |
KR100253354B1 (en) | Operation testing apparatus for semiconductor memory | |
KR970051221A (en) | Semiconductor memory device with time division word line driver circuit | |
KR930022384A (en) | Semiconductor memory | |
JP2000030494A5 (en) | ||
KR930001230A (en) | Semiconductor memory device and semiconductor integrated circuit device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |