KR970000723B1 - Mos fet of structure - Google Patents
Mos fet of structure Download PDFInfo
- Publication number
- KR970000723B1 KR970000723B1 KR93013696A KR930013696A KR970000723B1 KR 970000723 B1 KR970000723 B1 KR 970000723B1 KR 93013696 A KR93013696 A KR 93013696A KR 930013696 A KR930013696 A KR 930013696A KR 970000723 B1 KR970000723 B1 KR 970000723B1
- Authority
- KR
- South Korea
- Prior art keywords
- region
- ldd
- gate electrode
- ldd region
- punch
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
A gate electrode(10) is formed on a first conductive-type semiconductor substrate(1). An LDD(lightly doped drain) region(8) of second conductive-type formed in the substrate(1) is overlap the gate electrode(10). Under the LDD region(8), a punch-through stopping region(7) is fully overlap the LDD region(8). The punch-through stopping region(7) is located only under the LDD region(8), thereby it is possible to prevent the back-bias effect of MOSFETs. Also, the LDD region(8) is located to the lower part of the gate electrode(10), thereby preventing a generation of the hot carreier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93013696A KR970000723B1 (en) | 1993-07-20 | 1993-07-20 | Mos fet of structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93013696A KR970000723B1 (en) | 1993-07-20 | 1993-07-20 | Mos fet of structure |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950004590A KR950004590A (en) | 1995-02-18 |
KR970000723B1 true KR970000723B1 (en) | 1997-01-18 |
Family
ID=19359632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR93013696A KR970000723B1 (en) | 1993-07-20 | 1993-07-20 | Mos fet of structure |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970000723B1 (en) |
-
1993
- 1993-07-20 KR KR93013696A patent/KR970000723B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950004590A (en) | 1995-02-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20091222 Year of fee payment: 14 |
|
LAPS | Lapse due to unpaid annual fee |