KR960702943A - Logical THREE-DIMENSIONAL INTERCONNECTIONS BETWEEN INTEGRATED CIRCUIT CHIPS USING A TWO-DIMENSIONAL MULTI-CHIP MODULE PACKAGE - Google Patents
Logical THREE-DIMENSIONAL INTERCONNECTIONS BETWEEN INTEGRATED CIRCUIT CHIPS USING A TWO-DIMENSIONAL MULTI-CHIP MODULE PACKAGEInfo
- Publication number
- KR960702943A KR960702943A KR1019950705101A KR19950705101A KR960702943A KR 960702943 A KR960702943 A KR 960702943A KR 1019950705101 A KR1019950705101 A KR 1019950705101A KR 19950705101 A KR19950705101 A KR 19950705101A KR 960702943 A KR960702943 A KR 960702943A
- Authority
- KR
- South Korea
- Prior art keywords
- dimensional
- logical
- integrated circuit
- chip module
- circuit chips
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Geometry (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US21314694A | 1994-03-15 | 1994-03-15 | |
US08/213,146 | 1994-03-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960702943A true KR960702943A (en) | 1996-05-23 |
KR100360074B1 KR100360074B1 (en) | 2003-01-24 |
Family
ID=22793918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950705101A KR100360074B1 (en) | 1994-03-15 | 1995-01-20 | Logical three-dimensional interconnection between integrated circuit chips using two-dimensional multichip module packages |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0698294A1 (en) |
KR (1) | KR100360074B1 (en) |
WO (1) | WO1995025348A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5894565A (en) * | 1996-05-20 | 1999-04-13 | Atmel Corporation | Field programmable gate array with distributed RAM and increased cell utilization |
US6407576B1 (en) | 1999-03-04 | 2002-06-18 | Altera Corporation | Interconnection and input/output resources for programmable logic integrated circuit devices |
EP1705798B1 (en) * | 1999-03-04 | 2015-10-21 | Altera Corporation | Interconnection and input/output resources for programmable logic integrated circuit devices |
US6351144B1 (en) * | 1999-07-15 | 2002-02-26 | Altera Corporation | Programmable logic device with unified cell structure including signal interface bumps |
WO2001093426A1 (en) * | 2000-05-30 | 2001-12-06 | Koninklijke Philips Electronics N.V. | Integrated circuit with a matrix of programmable logic cells |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02161754A (en) * | 1988-12-14 | 1990-06-21 | Nec Corp | Semiconductor integrated circuit of building block system |
DE69004414T2 (en) * | 1989-09-22 | 1994-02-24 | Renishaw Plc | MODULAR CLAMPING SYSTEM FOR MACHINE TOOLS. |
JP3002512B2 (en) * | 1990-09-10 | 2000-01-24 | 株式会社日立製作所 | Integrated circuit device |
US5432708A (en) * | 1992-10-08 | 1995-07-11 | Aptix Corporation | Multichip module integrated circuit device having maximum input/output capability |
-
1995
- 1995-01-20 KR KR1019950705101A patent/KR100360074B1/en not_active IP Right Cessation
- 1995-01-20 EP EP95908601A patent/EP0698294A1/en not_active Withdrawn
- 1995-01-20 WO PCT/US1995/000796 patent/WO1995025348A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
WO1995025348A1 (en) | 1995-09-21 |
EP0698294A1 (en) | 1996-02-28 |
KR100360074B1 (en) | 2003-01-24 |
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Legal Events
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20111011 Year of fee payment: 10 |
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LAPS | Lapse due to unpaid annual fee |