KR960027716A - Serial Bus Redundancy Communication Logic in Electronic Switching System - Google Patents

Serial Bus Redundancy Communication Logic in Electronic Switching System Download PDF

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Publication number
KR960027716A
KR960027716A KR1019940039450A KR19940039450A KR960027716A KR 960027716 A KR960027716 A KR 960027716A KR 1019940039450 A KR1019940039450 A KR 1019940039450A KR 19940039450 A KR19940039450 A KR 19940039450A KR 960027716 A KR960027716 A KR 960027716A
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KR
South Korea
Prior art keywords
serial bus
switching system
communication logic
electronic switching
redundancy communication
Prior art date
Application number
KR1019940039450A
Other languages
Korean (ko)
Other versions
KR0146743B1 (en
Inventor
강석환
Original Assignee
정장호
Lg 정보통신주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 정장호, Lg 정보통신주식회사 filed Critical 정장호
Priority to KR1019940039450A priority Critical patent/KR0146743B1/en
Publication of KR960027716A publication Critical patent/KR960027716A/en
Application granted granted Critical
Publication of KR0146743B1 publication Critical patent/KR0146743B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4031—Coupling between buses using bus bridges with arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

본 발명은 전전자교환기에서 데이타 통신처리수단과 관련된 것으로서, 종래에는 이러한 통신처리를 병렬버스와 TTL 버퍼등으로 수행하고 있었기 때문에 이러한 시스템의 통신오류와 품질저하를 피하기 어려운 것이었다.The present invention relates to data communication processing means in all electronic switchboards. In the past, such communication processing was performed by parallel buses and TTL buffers.

본 발명은 이러한 문제점을 개선할 수 있도록 제어보드와 가입자보드의 시피유에 탑재된 에스시시포트 사이에는 이중화된 에스시버스(SC-busø,SC-bus1)와, 가입자보드측의 복수버스중재회로(12c)를 구비시켜 처리하는 직렬버스 이중화 통신 로직을 제공하는데 있다.The present invention provides a dual bus arbitration circuit (SC-busø, SC-bus1) between the control board and the esci port mounted on the CSI of the subscriber board and the multiple bus arbitration circuit (S-sub) to improve the problems. 12c) to provide serial bus redundancy communication logic for processing.

Description

전전자교환기에서 직렬버스 이중화 통신 로직Serial Bus Redundancy Communication Logic in Electronic Switching System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 직렬버스 이중화 통신 로직이 구비된 시스템 회로 블럭도.3 is a system circuit block diagram provided with serial bus redundancy communication logic according to the present invention.

Claims (1)

백보드상의 제어보드와 가입자보드간에 통신처리를 하는 수단에 있어서, 제어보드(11) 및 가입자보드(12)의 시피유(11a,12a)에 탑재되어져 있는 에스시시포트 (11b,12b) 사이에는 이중화된 에스시버스(SC-busø,SC-bus1)와, 가입자보드(12)측에 구비시킨 복수의 버스중재회로(12c)로 이뤄져 있는 것을 특징으로 하는 전전자교환기에서 직렬버스 이중화 통신 로직.In the means for performing communication processing between the control board on the back board and the subscriber board, the control board 11 is duplicated between the SSI ports 11b and 12b mounted on the CP oils 11a and 12a of the subscriber board 12. Serial bus redundancy communication logic in an electronic switching system comprising an S-bus (SC-bus ?, SC-bus1) and a plurality of bus arbitration circuits (12c) provided on the subscriber board (12) side. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039450A 1994-12-30 1994-12-30 Arbitrator with duplication communication logic of serial bus in electronic switching system KR0146743B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940039450A KR0146743B1 (en) 1994-12-30 1994-12-30 Arbitrator with duplication communication logic of serial bus in electronic switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940039450A KR0146743B1 (en) 1994-12-30 1994-12-30 Arbitrator with duplication communication logic of serial bus in electronic switching system

Publications (2)

Publication Number Publication Date
KR960027716A true KR960027716A (en) 1996-07-22
KR0146743B1 KR0146743B1 (en) 1998-08-17

Family

ID=19405551

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940039450A KR0146743B1 (en) 1994-12-30 1994-12-30 Arbitrator with duplication communication logic of serial bus in electronic switching system

Country Status (1)

Country Link
KR (1) KR0146743B1 (en)

Also Published As

Publication number Publication date
KR0146743B1 (en) 1998-08-17

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