KR960020354A - Vertical Raster Automatic Control Circuit of Television - Google Patents

Vertical Raster Automatic Control Circuit of Television Download PDF

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Publication number
KR960020354A
KR960020354A KR1019940029532A KR19940029532A KR960020354A KR 960020354 A KR960020354 A KR 960020354A KR 1019940029532 A KR1019940029532 A KR 1019940029532A KR 19940029532 A KR19940029532 A KR 19940029532A KR 960020354 A KR960020354 A KR 960020354A
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KR
South Korea
Prior art keywords
vertical
raster
unit
signal
apl
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KR1019940029532A
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Korean (ko)
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KR100251588B1 (en
Inventor
이홍우
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배순훈
대우전자 주식회사
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Priority to KR1019940029532A priority Critical patent/KR100251588B1/en
Publication of KR960020354A publication Critical patent/KR960020354A/en
Application granted granted Critical
Publication of KR100251588B1 publication Critical patent/KR100251588B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/223—Controlling dimensions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/57—Control of contrast or brightness

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

본 발명은 텔레비젼의 수직라스터 자동제어회로에 관한 것으로, 수직구동입력을 수취하여 B+전원에 의해 적당한 구동신호로 생성하는 수직트리거부(10)와 그 수직트리거부(10)에 의해 생성되는 수직구동신호에 기초하여 일정한 타이밍을 갖는 램프(Ramp)파를 생성하는 램프신호생성부(10), 그 생성된 램프파신호에 의해 구동되는 수직구동부(18) 및 수직증폭출력부(20), 출력회로의 소비전력을 최소화하기 위한 펌프업(Pump-up)회로부(22)를 포함하여 구성되어 수직편향코일(24)에 인가되는 편향전류를 발생하도록 구성된 텔레비젼의 수직편향회로에서, 휘도신호(-Y)에 기초하여 얻어지는 APL치에 따라 상기 램프신호생성부(10)의 시정수를 조절하여 화면의 수직방향 라스터의 크기를 보상하는 수직라스터제어부(42)를 더 구비하여 구성되고, 상기 수직라스터제어부(42)가 상기 휘도신호(-Y)를 적분하여 APL치의 변동분을 얻는 적분소자(44,46,48)와, 그 적분된 휘도신호의 APL변동분에 따라 ON/OFF되는 스위칭트랜지스터(56), 그 스위칭트랜지스터(56)의 컬렉터측에 접속되어 그 APL변동분에 의한 수직방향 라스터 크기를 변환하는 저항수단(56)을 포함하여 구성되어, 휘도신호를 적분하며 얻어지는 화면밝기변화(APL치)에 대해 수직편향주기를 적응적으로 가변시켜 화면의 밝기가 변화되는 경우에도 수직방향 라스터 크기를 일정하게 제어함으로써 안정된 주사동작이 가능하도록 된 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical raster automatic control circuit of a television, and includes a vertical trigger unit (10) and a vertical trigger unit (10) generated by the vertical trigger unit (10) for receiving a vertical drive input and generating an appropriate drive signal by the B + power supply. A ramp signal generation unit 10 for generating a ramp wave having a predetermined timing based on the drive signal, a vertical driving unit 18 and a vertical amplification output unit 20 driven by the generated ramp wave signal, and an output In a vertical deflection circuit of a television including a pump-up circuit section 22 for minimizing the power consumption of the circuit and configured to generate a deflection current applied to the vertical deflection coil 24, the luminance signal (- And a vertical raster controller 42 for adjusting the time constant of the lamp signal generator 10 according to the APL value obtained based on Y) to compensate for the size of the vertical raster of the screen. Vertical Raster Control Unit An integrating element (44, 46, 48) (42) integrating the luminance signal (-Y) to obtain a variation in the APL value, and a switching transistor (56) turned on / off in accordance with the APL variation of the integrated luminance signal, And a resistance means 56 connected to the collector side of the switching transistor 56 to convert the vertical raster size due to the APL fluctuation, to the screen brightness change (APL value) obtained by integrating the luminance signal. By adaptively varying the vertical deflection period, even when the brightness of the screen changes, the vertical raster size is constantly controlled to enable stable scanning operation.

Description

텔레비젼의 수직라스터 자동제어회로Vertical raster automatic control circuit of TV

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 텔레비젼의 수직라스터 자동제어회로가 부가된 수직편향회로를 나타낸 도면이다.1 is a diagram showing a vertical deflection circuit to which a vertical raster automatic control circuit of a television according to the present invention is added.

Claims (2)

수직구동입력은 수취하여 B+전원에 의해 적당한 구동신호로 생성하는 수직트리거부(10)와 그 수직트리거부(10)에 의해 생성되는 수직구동신호에 기초하여 일정한 타이밍을 갖는 램프(Ramp)파를 생성하는 램프신호 생성부(10), 그 생성된 램프파신호에 의해 구동되는 수직구동부(18) 및 수직증폭출력부(20), 출력회로의 소비전력을 최소화하기 위한 펌프업(Pump-up)회로부(22)를 포함하여 구성되어 수직편향코일(24)에 인가되는 편향전류를 발생하도록 구성된 텔레비젼의 수직편향회로에 있어서, 휘도신호(-Y)에 기초하여 얻어지는 APL치에 따라 상기 램프신호생성부(10)의 시정수를 조절하여 화면의 수직방향 라스터의 크기를 보상하는 수직라스터제어부(42)를 더 구비하여 구성된 것은 특징으로 하는 텔레비젼의 수직라스터 자동제어회로.The vertical drive input receives a ramp wave having a constant timing based on the vertical trigger unit 10 that receives and generates an appropriate drive signal by the B + power supply and the vertical drive signal generated by the vertical trigger unit 10. A ramp signal generation unit 10 to generate, a vertical driving unit 18 and a vertical amplification output unit 20 driven by the generated ramp wave signal, pump-up to minimize the power consumption of the output circuit In a vertical deflection circuit of a television comprising a circuit section 22 and configured to generate a deflection current applied to the vertical deflection coil 24, the ramp signal generation is performed in accordance with an APL value obtained based on the luminance signal (-Y). And a vertical raster control unit (42) for adjusting the time constant of the unit (10) to compensate for the size of the vertical raster of the screen. 제1항에 있어서, 상기 수직라스터제어부(42)가 상기 휘도신호(-Y)를 적분하여 APL치의 변동분을 얻는 적분소자(44,46,48)와, 그 적분된 휘도신호의 APL변동분에 따라 ON/OFF되는 스위칭트랜지스터(56), 그 스위칭트랜지스터(55)의 컬렉터측에 접속되어 그 APL변동분에 의한 수직방향 라스터 크기를 변환하는 저항수단(56)을 포함하여 구성된 것을 특징으로 하는 텔레비젼 수직라스터 자동제어회로.2. The integrated raster control section (42) according to claim 1, wherein the vertical raster controller (42) integrates the luminance signal (-Y) to obtain variations of the APL value, and to the APL variation of the integrated luminance signal. And a switching means 56 connected to the collector side of the switching transistor 55, which is turned ON / OFF according to the switching transistor 55 and converts the vertical raster size by the APL variation. Vertical raster automatic control circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940029532A 1994-11-11 1994-11-11 Automatic vertical raster control circuit for television KR100251588B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940029532A KR100251588B1 (en) 1994-11-11 1994-11-11 Automatic vertical raster control circuit for television

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940029532A KR100251588B1 (en) 1994-11-11 1994-11-11 Automatic vertical raster control circuit for television

Publications (2)

Publication Number Publication Date
KR960020354A true KR960020354A (en) 1996-06-17
KR100251588B1 KR100251588B1 (en) 2000-04-15

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Application Number Title Priority Date Filing Date
KR1019940029532A KR100251588B1 (en) 1994-11-11 1994-11-11 Automatic vertical raster control circuit for television

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100463620B1 (en) * 2000-12-25 2004-12-29 산요덴키가부시키가이샤 Vertical deflection driving circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100463620B1 (en) * 2000-12-25 2004-12-29 산요덴키가부시키가이샤 Vertical deflection driving circuit

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KR100251588B1 (en) 2000-04-15

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