KR960014689B1 - Estimation method for packet handing module in switching system - Google Patents

Abstract

In the performance measuring method of an apparatus including an Access Switching Processor for Packet 1, an Inter Processor Communication bus 2, a Packet Layer Control Processor 3, a Packet bus 4, a Packet Handling Module 5, a Time Switch 6, a Traffic Generator 7, and a Management Terminal 8, the method comprises the steps of: deciding a task when inputting an operator instruction and a receive event; explaining and stopping an operating instruction when outputting help message; screen outputting and stopping a subscriber information having a plurality of traffic generators when outputting from DB; screen outputting and stopping a X.25 state of a virtual call when inputting a state; modifying and stopping the subscriber information by subscriber having multiple traffic generators when updating DB; screen outputting and stopping the call process test result and test result of data processing amount when outputting the result; deciding and stopping an update time unit to a time interval which computes a statistical value when being the update time; closing and stopping respectively a traffic generation of each subscriber when releasing a call; generating a link state connection transfer call, transferring a driving transfer virtual call state into r1 and stopping when being a link connection; driving the transfer of a link state connection transfer call generating state and stopping when disconnecting the link; processing and stopping when generating the call; and processing and stopping when being a receiving packet.

Description

How to measure packet processor performance

1 is an overall system configuration to which the present invention is applied.

2 is a block diagram illustrating packet information of a traffic generator.

3 is a state transition diagram of a traffic generator.

4 is a task diagram.

5 is a general flow diagram of the present invention.

* Explanation of symbols for main parts of the drawings

1: Acess Switching Processor for Packet

2: Inter Processor Communication bus

3: Packet Layer Control Processor

4: Packet bus

5: Packet Handing Module

6: Time Switch 7: Traffic Generator

8: Management Terminal

The present invention relates to a method for measuring packet processor performance.

Packet-switched technology is a computer-to-computer communication technology.In the mid-'70s, developed countries began to develop their own data caching switch for PSDN and submitted a substantial contribution to CCITT. The protocol was recommended. Since then, it has been supplemented by recommending the X.25 protocol applied to other manganese.

With the introduction of the ISDN concept in the '80s, a switch that provided voice exchange and non-voice exchange services of existing telephones was output, and X.31 was recommended as a way to support existing X.25 packet services.

In the application phase of CCIT X.31, Case A provides only physical circuits to PSPDN (Packet Switching Public Data Network) for X.25 captive service, and Case B uses X because packet handlers exist inside ISDN like electronic switch. .25 provide packet services over the network.

The electronic switchboard performs the performance measurement after checking the basic functions of the packet exchange in the development stage. Since the test environment construction of performance measurement cannot establish the actual subscriber environment, performance measurement is very difficult.

The present invention devised to solve the above-mentioned problems of the prior art, a plurality of in order to measure the packet call processing capability and throughput, which is the core of the performance of the ASS-P (Access Switching Subsystem for Packet) packet processor of the electronic switching system We designed a traffic generator (TG) which can operate as a DTE (Date Terminal Equipment) to measure the performance of a packet processor that enables the performance measurement of packet processors in the network. The purpose is to provide.

In order to achieve the above object, the present invention provides an Switch Switching Processor for Packet, an Inter Processor Communication bus, a Packet Layer Control Processor, a Packet Bus, In the performance measurement method of a device including a packet handing module (hereinafter referred to as PHM), a time switch, a traffic generator, and a management terminal, operator commands and receptions are provided. Determining a task when an event input is received; After performing the first step, if the help outputs a second step after the operation command is explained; A third step of performing after the first step and outputting information of subscribers having a plurality of traffic generators if the DB output is performed; A fourth step of, after outputting the state, outputting the X.25 state of the virtual call after outputting the state; A fifth step of modifying and terminating a subscriber's information by a subscriber having a plurality of traffic generators after performing the first step; A sixth step of, after the first step, outputting the result of the call processing test and the data throughput test if the result is output; A seventh step of determining and updating an update time unit at a time interval for calculating a statistical value at the update time after performing the first step; An eighth step of stopping and ending traffic generation for each subscriber if the call is stopped after performing the first step; A ninth step of performing a link state connection transition call when the link connection is performed after the first step is performed, and the driving transition virtual call state transitions to r1 and terminates; A tenth step of terminating the link state connection transition call generation state driving transition after the first step is performed; An eleventh step of processing and ending a call occurrence after performing the first step; And a twelfth step of processing and terminating the received packet after performing the first step; It is made, including.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a system configuration to which the present invention is applied.

1 is an Access Switching Processor for Packet, which is responsible for connecting and disconnecting the physical paths of the system, and sharing the functions of Layer 2 and Layer 3.

2 is an interprocessor communication bus, which is a data bus for communication between an exchange matching processor and a packet layer control processor.

3 is a packet layer control processor (Fix Layer Control Processor) to manage a number of packet processing module fixedly, and control the packet call, call verification and logical channel management.

4 is a packet bus, which is a data bus for communication between a packet layer control processor and a packet processing module.

5 is a packet handing module (hereinafter referred to as PHM) to perform functions of a link layer and a packet layer of a packet call.

6 is a time switch link connected to the packet processing module as a time switch.

7 is a device for generating packet traffic with a traffic generator.

8 is a device for controlling packet traffic to a management terminal.

The TG link and the PHM link were connected one-to-one through T-SW and connected. The operating terminal is connected to the TG to control the TG by the operator's command.

When the traffic generator is configured to perform a plurality of data terminal equipment (DTE) functions, the traffic generator has the following subscriber information.

Subscriber information consists of LOX (Lowest Outgoing Channel),

Highest Outgoing Channel (HOC),

LOW (Lowest Incoming Channel),

High Incoming Channel (HIC),

Packet Size (hereinafter referred to as PS),

Window Size (hereinafter referred to as WS),

There are test types, X.25 states (r-states, p-states), and Layer 2 (link) states.

1. The traffic generator consists of 8 subscriber information. The reason for having 8 subscriber information is that 8 PHM links can be connected to the packet processor of an electronic switchboard. The maximum number of virtual calls per subscriber is 16. The subscriber's outgoing logic channel number ranged from 100 to 85 and the incoming logical channel number ranged from 1 to 15. The packet size ranged from 16 bytes to 25 bytes and the window size ranged from 2 to 7. The r-state was set to the initial state r1, the p-state to the initial state p1, and the d-state to the initial state d1. Subscriber address system is Pf (3) Tg (2) LK (2), Pf (3) is Prifix 3 digit, Tg (2) is traffic generator number 2 digit, and LK (2) is link number 2 digit.

2 is an X.25 state transition diagram of the present invention.

TG processed the receive task by dividing the X.25 protocol into the P-state, which is the packet protocol control state, the d-state, which is the data packet transmission state, and the r-state, which is the error recovery state. The r-state was r1, r2, the p-state was p1, p2, p4, p6, and the d-state was d1, d2.

21 transitions to r1 when the restart request packet is received in the X.25 r1 state, transitions to r2 when the restart request packet is transmitted in the r1 state, and the T20 timer composition, and restarts when the restart request packet is received in the r2 state. Transition.

The p state is a substate of the r1 state and the d state is the p4 substate.

22 transitions to P1 when receiving a release request and incoming packet in X.25 p1 state, transitions to p2 when transmitting call request packet in p1 state, drives T21 timer, and transitions to p4 when call connection packet is transmitted in p1 state, p1 state Transitions to p6 and starts the T23 timer when sending a demand packet.

Transition to p4 when a call connection packet is received in p2 state. Transition to p6 when a call release packet is received in p2 state.

Transmit to p6 when receiving the release packet in p4 state and run T23 timer.

Transition to p1 upon receipt of a release and release acknowledgment packet in p6 state.

23 transitions to r1 when a reset request packet is received in the X.25 d1 state.

Transition to d2 when the reset request packet is sent in d1 state and start the T22 timer, and transition to d1 when the reset request in d2 state is received and reset confirmation packet is received.

3 is a task diagram.

The program configuration is divided into task processing driven by an operator command and task processing driven by a received event.

Tasks driven by operator commands allow the operator to freely generate, stop, and output test results.The types of tasks are (31) subscriber information output task, (32) subscriber information modification task, and (33) virtual call. Status output tasks, (34) packet call generation tasks, (35) packet call reduction tasks, (36) test result output tasks, and (37) test result update tasks.

The task driven by the received event is to handle the events received from DCE on the traffic generator / DCE (Data Circuit Equipmen) interface, which are (38) link connection task, (39) link disconnection. There is a notification task, (40) a receiving packet processing task.

Description of each task as described above will be described in detail in FIG.

4 is a general flow diagram in accordance with the present invention.

When an operator command is input 41, the task type 42 is distinguished and each task is processed.

Description of operation command (43), information of subscribers having multiple traffic generators (44), output of X.25 status of virtual call (45), subscribers having multiple traffic generators for traffic generator operation Modify the information of the subscriber (46), display the call processing test results and data throughput test results (47), determine the update time unit by the time interval for calculating the statistics (48), stop traffic generation for each subscriber (49). The link state connection transition call is generated during the link connection, the drive transition virtual call state transitions to r1 and ends (50), and the link state connection transition call generation state drive transition is terminated (51) when the link is disconnected.

Traffic generation can occur selectively per virtual call of the link (each DTE), and check the connection status of the link on the TG / DEC interface (52), and if it is disconnected, send SABM (Set Asynchromous Balanced Mode) to the packet processor (53). After 2 seconds (54), the connection state of the link is checked, and if it is disconnected, it branches to the process (52), and if connected, it branches to (56). If the link is connected at (52), the flow branches to (56). After the link connects, it allocates a buffer with reference to subscriber information and transmits a call request packet to DCE. At this time, the timer T21 is driven and the virtual call X.25 state is changed to P2 state and the number of trials is increased by 56 according to the test type (56).

When the reception event is input in step 51, the task type is distinguished in step 52, and each task is processed. The length of the received packet is verified (57) and, if appropriate, copied to the allocated buffer at (56).

Check the logical channel (60). At 60, if the logical channel is 0, the packet type is checked (61). If the packet type is the restart request or restart confirmation packet, the operation of the T20 timer is stopped and the state is shifted to the r1 state (62).

At 60, the logical channel is checked (63). If the logical channel is 0, the packet type is checked (65). If the packet type is a restart request at 65, all timer operation of this subscriber is determined, and the restart acknowledgment packet is sent to the DCE and transitioned to the r1 state (66). If the packet type is a restart acknowledgment packet at 65, all the virtual calls of this subscriber are transferred to the p1 state and the timer is stopped. In addition, the restart request packet is transmitted to the DCE, and the T20 timer is driven and transitioned to the r2 state (67).

In step 63, the logical channel is checked, and if the logical channel is 0, the virtual call state is checked (64). If p1, the packet type is checked (68). If the packet type is a release request, the release acknowledgment packet is transmitted to the DCE. In addition, the test result is calculated and the request packet is transmitted to the DCE and transitioned to the p2 state (69).

If the packet type is an incoming call at 68, the received packet is transmitted to the DCE and transitioned to the p4 state. If the packet type is not a release request or an incoming call at 68, when the release request packet is transmitted to the DCE, the T23 timer is driven and transitioned to the p4 state.

At 64, if the virtual call state is p2, the T21 timer operation is stopped (72), and the packet type is checked (73), branching to (71) if it is not a release request or connection, and branching (69) if it is a release request. In addition, if the connection is p4 state transition (74), the test pattern is inspected (75), and if the call processing is branched to (71), if the throughput is the d state transition to d1 and the number of data transfers is increased (76).

In (64), if the virtual call state is p4, the packet type is checked (77). If the release request is requested, branching to (69). Otherwise, the virtual call state is checked (68). At this time, if reset request or reset is confirmed, T22 stops driving and transitions to receive ready and p4 state.

If the virtual call state is not d2 (79), the packet type is checked (79). If the reception is not ready, the state transitions to the reception ready state (81). If the reception is ready, the transition is made to the reception preparation state (82). Transmit the reset acknowledgment packet to DCE and transition to the receive ready state and p4 state (83). Also check the receive state for data (84) and branch to non-receive (86), and send the receive ready packet to DCE. Transition to the reception ready state (85).

Therefore, the present invention as described above can measure and evaluate the performance of a packet processor through a traffic generator, thereby improving packet processor performance and establishing a test environment for system management and next-generation packet processor performance measurement.

Claims (4)

Access Switching Processor for Packet (1), Inter Processor Communication bus (2), Packet Layer Control Processor (3), Packet bus (4) ), A packet handling module (hereinafter referred to as PHM) (5), a time switch (6), a traffic generator (7), and a management terminal (8). A method for measuring performance of an apparatus comprising: a first step of determining a task when an operator command and a received event input are received; After performing the first step, if the help outputs a second step after the operation command is explained; A third step of performing after the first step and outputting information of subscribers having a plurality of traffic generators if the DB output is performed; A fourth step of, after outputting the state, outputting the X.25 state of the virtual call after outputting the state; A fifth step of modifying and terminating a subscriber's information by a subscriber having a plurality of traffic generators after performing the first step; A sixth step of, after the first step, outputting the result of the call processing test and the data throughput test if the result is output; A seventh step of determining and updating an update time unit at a time interval for calculating a statistical value at an update time after performing the first step; An eighth step of stopping and ending traffic generation for each subscriber if the call is stopped after performing the first step; A ninth step in which a link state connection transition call is generated when the link connection is performed after the first step is performed, and the driving transition virtual call state transitions to r1 and terminates; A tenth step of terminating the link state connection transition call generation state driving transition after the first step is performed; An eleventh step of processing and ending a call occurrence after performing the first step; And a twelfth step of processing and ending a received packet after performing the first step; Packet processor performance measurement method comprising the. The method of claim 1, wherein the eleventh step comprises: a first step of generating traffic selectively per virtual call of a link (each DTE) and checking a link connection state on a TG / DCE interface; After performing the first process, if disconnected, transmit SABM (Set Asynchromous Balanced Mode) to the packet processor, and after the set time, check the connection state of the link. If disconnected, branch to the check state and if connected, refer to the subscriber information. Allocating a buffer, transmitting a call request packet to the DCE, and ending the second process; Packet processor performance measurement method, characterized in that comprises a. The method of claim 1, wherein the twelfth step comprises: a first step of checking a received packet length; A second step of terminating if abnormal after performing the first step and copying a received packet buffer if normal and checking a virtual call state; A third step of, after performing the second step, terminating the non-r1, r2 state and processing the r1 state; A fourth step of checking the logical channel and the packet type and ending after the r1 state transition if the r2 state is performed after the second process is performed; Packet processor performance measurement method, characterized in that comprises a. The method of claim 1, wherein the third process comprises: checking a logical channel, a packet type, and a virtual call state and ending after processing according to the virtual call state; After performing the above process, if the restart request transitions to the r1 state after the restart request and transitions to the p1, r2 state if the restart check; Packet processor performance measurement method, characterized in that comprises a.