KR960014307B1 - Multiplex facsimile apparatus - Google Patents

Abstract

The device includes a bus contact means(21) for contacting system bus and multiple facsimile line processing device, a facsimile line processing means(20) for transmitting and receiving a highway signal, a node signal, the first and second address signal from a signal converting circuit pack(12), a bus controlling means(23) for controlling bus, a double port memory(22) for receiving ADPCM voice information and character information, a ROM(26), ARAM(21), a central processing unit(24) and a data buffer(28) for storing ADPCM voice information and character information.

Description

Multi-facsimile line processing device for relay line connection

1 is an exemplary configuration of a facsimile communication processing service connection device to which the present invention is applied.

2 is a configuration diagram of a multi-fax line processing apparatus for relay line connection according to the present invention.

3 is a unit circuit configuration diagram for facsimile line processing.

* Explanation of symbols for main parts of the drawings

21: system bus connection circuit 22: dual port memory

23: bus control circuit 24: central control unit

25: peripheral circuit for control 26: program memory (ROM)

27: program memory (RAM) 28: data buffer

29: Multifunction Peripheral Device 30,34,37,40: DTMF Decoder

31,35,38,41: facsimile modem 32,36,39,42: PCM codec

33: signal conversion connection circuit

The present invention relates to a multiple facsimile line processing apparatus for relay line connection.

A service provider who wants to provide the retrieval, delivery, or mail service of text or facsimile information (gram information stored as facsimile code) to a user who owns a facsimile device in an existing public telephone network has a number of subscriber lines consisting of two wires or After this is assigned in the form of a representative number, a number of facsimile counters corresponding to the user's facsimile devices must be connected to the system bus.

In this case, the facsimile line processing converts character-facsimile information in addition to the facsimile device that the user possesses, a 2-wire telephone network connection circuit such as a modem, transformer, and hybrid circuit, and the facsimile facsimile communication control procedure and facsimile encoding function. Function, connection with host should be provided. This conventional technique inevitably reduces the signal attenuation of about 7 dB information, which is typical of the facsimile device and the exchange period, by using a general two-wire telephone network connection circuit, and due to the characteristics of the facsimile device using pixel-by-pixel encoding, There is a problem that causes an error.

The present invention devised to solve the above problems is that the connection to the existing telephone network is configured by the expansion of a separate trunk line unit (North American T1 trunk line or European E1 trunk line line) to prevent the existing telephone network to traffic (Traffic) It is an object of the present invention to provide a facsimile circuit processing apparatus capable of accessing a trunk line, which is essential for implementing a facsimile communication processing service capacity, which is a non-voice supplementary service, on a large scale.

In order to achieve the above object, the present invention provides a facsimile communication processing service connection including a signal conversion circuit pack, a multiple facsimile line processing circuit pack, a facsimile service processing circuit pack, a packet network connection circuit pack, a facsimile service back circuit pack, and a data service device. In an apparatus; A system bus connecting means for connecting the system bus and the multiple facsimile circuit processing apparatus, an automatic vector interrupt signal is received from the system bus connecting means through an internal bus, the signal conversion circuit pack and the TTL level highway signal and mode signal, and Facsimile line processing means for transmitting and receiving first and second address signals, bus adjustment means connected to said system bus connection means and said internal bus and performing bus adjustment, and system bus connection means to said internal bus through said bus adjustment means. Connected to the facsimile service processing circuit pack, a dual port memory for receiving ADPCM voice information and font information, connected to the internal bus, a ROM having multiple control programs in accordance with a facsimile communication control procedure, on the internal bus. Connected to stack area and variable data area A RAM used, and a data buffer connected to the internal bus to store an execution region of a control program, ADPCM voice information, and font information.

The present invention provides a facsimile user's DTMF information reception function, a facsimile modem (modulation and demodulation recommended in CCITT V.29 / 27ter / 21 No. 2), a control function of a multi-facsimile modem element, a voice information transmission function, and character information. Function to convert image information according to font data, facsimile encoding of image information according to Modifide Hufman (MH) or Modifide READ (MR) encoding method, TIT.30 Functions that control the facsimile communication procedure according to the control procedures recommended by the service, facsimile service processing circuits such as initialization of memory or font information, ADPCM (Adaptive Differential Pulse Coded Modulation) voice guidance information memory transfer, etc. Function to interact with

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1 is a configuration example of a facsimile communication processing service connection apparatus to which the present invention is applied, in which FIG. 11 is a telephone network connection device, 12 is a signal conversion circuit pack, 13 is a multi-facsimile line processing circuit pack, and 14 is a facsimile service processing circuit. A pack, 15 denotes a packet network connection circuit pack, 19 denotes a facsimile service back circuit pack, and 17 denotes a data service device.

As shown in the figure, the configuration of the facsimile communication processing device service connection device is as follows.

The telephone network connection device 11 is a digital trunk line connection circuit pack, a network synchronizer and a switching circuit pack, a signal among the circuit packs used in the existing all-electronic switch voice voice exchanger as shown in the internal configuration for the relay line function with the telephone network. Service call and related control information of subscriber facsimile connected to general telephone network along 4 connection paths with this apparatus 10 in the form of service circuit pack, telephone network connection control circuit pack, alarm collection and back circuit pack on TD bus Can be connected to the device.

That is, the service call of the subscriber facsimile is transmitted to the upper level exchange according to the inter-station signaling system and procedure between the telephone network exchanges, which are connected to the telephone network connection device 11 through one T1 or E1 relay line.

The signal conversion circuit pack 12 uses a circuit pack of the same function that performs a signal conversion function between the subscriber circuit and the telephone network connection device 11 in the all-electronic switchboard for the preferred implementation. The encoder element and the buffer were modified to supply. The circuit pack 12 has a function of transmitting the differential signal of the telephone network connection device 11 to the multiple facsimile circuit processing circuit pack 13, and parity for detecting an error in data transmission. Acknowledgment function Distributes the subhighway signal to a number of multiple facsimile line processing circuit packs 13, detects the main clock output from the telephone network connection device 11, displays it with LEDs, and redundancies the TD bus. .

The multi-facsimile line processing circuit pack 13 is connected to the signal conversion circuit pack 12 and the signals of the TTL level, so that the facsimile user receives DTMF information, the facsimile modem function, the control function of the multi-facsimile modem element, and the voice information. Sending function, changing character information into image information according to font data, facsimile encoding according to MH (Modified Huffman) or MR (Modified READ) coding method, CCITT's T.30 Recommendation Function to control facsimile communication according to the contents, and to initialize the memory or to interact with the memory information of the font information, ADPCM voice guidance information according to the service control of the facsimile service processing circuit pack 34.

The facsimile service processing circuit pack 14 is an initialization function of the device, connected to the multiple facsimile line processing circuit pack 13 by a system bus and connected to the telephone network connection device 11 via the facsimile service back circuit pack 16. Telephone network call processing using serial RS-232 connection to control circuit pack, control of multiple facsimile line processing unit, communication with system maintenance center, billing and maintenance function, call management function of information provider, Korean and English fonts It performs an information storage function, a storage function of guide voice information, and a packet network access circuit pack control function. The service back circuit pack 16 provides an alarm signal to the telephone network connection device 11.

The packet network connection circuit pack 14 is composed of two circuit packs, each of which is standard X for the packet network in the facsimile service processing circuit pack 13 to be connected to the packet network by two data service devices 17. .25 It provides call connection, data transfer and call release functions.

This is done by a program for interacting with the network layer, data link layer, and facsimile service processing circuit packs of the standard X.25 protocol.

2 is a block diagram of a multi-facsimile line processing apparatus for relay line connection according to the present invention, in which, 21 is a system bus connection circuit, 22 is a dual port memory, 23 is a bus control circuit, 24 is a central controller, and 25 is Is a control peripheral circuit, 26 is a program memory (ROM), 27 is a program memory (RAM), 28 is a data buffer, 29 is a multifunctional peripheral device, 30, 34, 37, 40 is a DTMF decoder, 31, 35, 38, 41 Is a facsimile modem, 32, 36, 39, 42 is a PCM codec, and 33 is a signal conversion connection circuit.

As shown in the drawings, the configuration of the present invention is as follows.

The internal bus is managed under the control of the central control unit (CPU) 24, and the clock dividing and the element selection signal processing to assist it are processed in the control peripheral circuit 25. As the central control unit 24 as a preferred embodiment, Motorola's MC68030-RC33B CPU was used, and a control peripheral circuit having a general configuration was composed of one element using a PGA (Programmable Gate Array) element. As a preferred embodiment of the PGA device, AMD's MACH130-15JC device was used, and a general address decoder, a buffer for address and data information, a clock divider circuit, and a circuit for DRAM control were configured as logic circuits.

The program memory (ROM) 26 is 256K bytes using two 27C010 EPROMs, the program memory (ROM) 27 is 64K bytes using two 62256 SRAMs, and the dual port memory 22 is a 4M bit DRAM D424400V- Eighty eight bytes (two for parity detection) are used to configure 8M bytes, of which 4M bytes are configured as a dual port memory 22 by adding a bus adjustment circuit 23 and a system bus connection circuit 21. Interaction with the facsimile service processing circuit pack 14 of FIG. The remaining 4M bytes are used as the data buffer 28 in executing the firmware embedded in the EPROM.

The bus adjustment circuit 23 first reads and writes the dual-port memory element selection signal of the central control unit 24 and the selection signal first attempted from the element selection signal generated by the host of the system bus, and ends the execution cycle. This circuit allows reading and writing of subsequent selection signals, and the system bus connection circuit 21, which is mostly composed of buffer and interpub control signals, uses one AMD MACH130-15JC RGA device.

The program memory (SRAM) 27 is used as a stack area and a variable data area, and the data buffer 28 and the dual port memory 22 are guide voice information and font information at startup of the device in a facsimile service processing circuit pack. Use as a space to move.

Multi-function Peripheral 29 is a one-chip device with one serial I / O port control function, four programmable timers, eight interrupt control or I / O port functions, and is programmed using Motorola's MC68901. It is equipped with RS-132 ° C interface for development and debugging. It connects the development monitor at the time of development and performs the monitor function to check the operation after development.

As the interrupt source, there are DTMF decoders 30, 34, 37, 40 and facsimile modem elements 31, 35, 38, 41, and the interrupt signals from these are connected to the interrupt control pins of the multifunction peripheral 29. Thus, it is possible to detect the DTMF signal input from the telephone button of the facsimile user, which has been flown through the relay line in real time, and the four facsimile modems (31, 35, 38, 41) required by the facsimile communication control procedure. It is possible to transmit and receive data on the channel in real time. One of the four timers is used to set the communication speed of the RS-232C channel, and three are used as a 20 second timer watch dog (Watch Dog Timer) as a real time clock to implement the timer interrupter function of 10 m and 40 m seconds, respectively. It was. The 16 interrupt control functions that can be embedded and processed in the multifunction peripheral 29 are processed as level 6 interrupts of the central control unit 24 through the internal bus.

The system bus connection circuit 21 uses a bus compatible with the Motorola VMS bus standard. The data transfer and interrupt functions using the P1 connector are made compatible, and the P2 connector is a data bus in the B column (Comumn). Signal lines except parts are defined and used independently. An example is shown in the table below. Here, the B column 3 signal is a signal that loops back and outputs the ground signal of the power supply to be the ground signal level at the time of mounting, so that the hernia state can be detected.

Signals in columns A and C are signal lines communicating with the signal conversion circuit pack connected to the relay line, and the subhighway signals DxO and DrO of the TTL level, the address signals (ADD 0 to 1 signals), and the mode signals (MODO to 1 signals) And clock signals (MCLK, DCLK, FS), codec control signals (SO, SI 0: 7 signals), and unique number output signals (ID7 to ID0 signals) of this circuit pack. The function of each signal is as follows.

Signal Name Signal Function

DxO: 2.048 MHz Subhighway Transmit Signal

DrO: 2.048 MHz subhighway received signal

MCLK: 2.048 MHz clock for synchronization

FS (Frame Sync): 8KHz clock for synchronization

TxD: Transmission data (control information) with telephone network connection device

RxD: Received data (control information) with telephone network access device

ADD 0 ~ 1: Address information (4 PCM codec device selection signals)

MOD ~ 0 ~ 1: Mode information (type information signal of control information)

SO (serial): Circuit pack ID signal (output)

SI (Serial): Slot Selection Signal

DCLK: Clock for TxD, RxD data synchronization

ID 0 ~ 7: Serial number of this circuit pack (for service host)

Board Hernia: Board Hernia Signal (1: Hernia, 0: Mount)

A24 ~ 31: Address signal on the system bus

D16 ~ 31: Data signal on the system bus

GND: Signal Ground

+ 5V: + 5V Power

-5V: -5V power supply

Here, the mode signals Mod 0 to 1 are operation classification information such that the telephone network connection device 11 of FIG. 1 reads codecs and circuit pack unique numbers on the circuit pack, writes control information, etc., and is a TTL level subhighway signal. In general, the telephone line subscriber line information (64KHz) corresponding to 32 subscribers is supplied to the device in a multiplexed form of 2.048MHz (32 × 64KHxz) frequency. 3 shows a detailed configuration of a unit circuit for facsimile line processing corresponding to the facsimile apparatus.

Here, the facsimile line processing means that the intended information can be communicated by having the same method according to the modulation / demodulation method and the communication control method of the device which the facsimile device connected to the telephone network has.

3 is a diagram illustrating a unit circuit for facsimile line processing.

The PCM codec 32 and the facsimile modem 31 are connected one-to-one and connected in parallel to an internal bus. In the present invention, four facsimile line processing circuits are used as preferred embodiments in consideration of the maximum mounting allowance per circuit. Configured.

The facsimile modem 31 has a single immersion facsimile transmission and reception function. In the present invention, the R96VFX device of Rockwell, USA, is used as a preferred embodiment. This device features the modulation and demodulation function recommended by CCITT V.29 / 27ter / 21 No.2, HDLC frame generation / interpretation function, flag pattern detection function of frequency shift keying signal, train signal generation function, DTMF Built-in signal generation function and full-duplex ADPCM codec to transmit / receive voice information and equalization function, so the central control device can set or reset 26 registers that correspond to the functions of the modem device. To perform.

It is connected to the internal bus with 5 bits of address signal, 8 bits of data signal, device selection signal and interrupt signal, and read / write control signal. It receives 26.39998MHz clock from generator 2 and uses it as execution clock.

The DTMF decoder 30 is a number for detecting the DTMF signal input from the user's facsimile. In this embodiment, the MT88970 device of Mitel Inc. is used. When a valid DTMF signal is detected among the received signals received through the PCM codec 32, the interrupt signal is detected. It informs this to the central control element and informs it of the value through the 4-bit data signal connected to the internal bus. The clock signal from the oscillation element 1 is supplied as the reference frequency.

Oscillator 1 is mode-connected to the XTALIN terminals of the four facsimile modem devices and oscillator 2 is mode-connected to the OSCIN terminals of the four DTMF decoders.

In the facsimile modem 31, a digital circuit and an analog circuit are integrated into one chip, and in a power supply circuit (added to supply analog power circuits of modem elements separately from a digital power circuit), each power and signal ground is ferrite bead. It should play a role of separating and connecting the power by combination of capacitor and bead so that mutual noise does not cause interference by using.

The PCM codec 32 receives the sub highway signal (3.048 MHz) of the TTL level buffered from the signal conversion circuit OR 12 of FIG. 1, and when the codec control information decoder circuit of 32 channels allocates a valid channel, A 64KHz signal (output signal of a facsimile device connected to a telephone network input through a relay line) is connected to the facsimile modem 31 in the form of a transmission signal and a 4-wire (two-wire ground) signal of a reception signal. As an example, a TP3070 device manufactured by National Semiconductor Inc. was used. At this time, the buffered subhighway signal is distributed to each of the facsimile circuit processing unit circuit input terminals and connected in parallel. Each of the four PCM codecs, the DTMF decoder, and the facsimile modem share one signal conversion connection circuit 33.

In addition, to maintain the optimal reception of the four-wire signal connected to the modem element to configure the interconnection to adjust the gain of the communication signal using the OP amplifier to interconnect, and to drive the automatic gain circuit built into the modem element The analog signal output signal provided by the modem element is bridged and returned to the resistor, and the received signal of the PCM codec 32 is input to the DTMF decoder 30 so that the DTMF decoder 30 can process the user input. To scale, the gain was adjusted using an op amp.

The gain adjustment circuit 43 is configured between the facsimile modem 31 and the PCM codec, and in a preferred embodiment, a 9-pin hybrid IC is installed to minimize the change of characteristics due to the heat of the analog circuit and to facilitate the mounting. It was planned. At this time, each DTMF decoder 30 supplies an independent clock of 3.579545 MHz.

The mode signal and address / control signal are input via the P2 connector of the system bus as shown in the table above, and are supplied to the PCM codec element via a codec control information decoder circuit composed of a buffer and a simple logic circuit. The functions of each signal are as described above, and the dual TxD and RxD signals are used to read / write PCM codec elements in the telephone network connection device, gain values, etc. in a serial bit string in synchronization with the data clock DCLK. The codec control information decoder circuit of the signal conversion connection circuit 33 in FIG. 2 provides a path for this information.

Thus, the reception of the DTMF signal of the facsimile user is achieved by the DTMF decoder connected to the output of the codec and filter element detecting it and generating an interrupt to the central processing unit. The facsimile modem function and announcement voice information sending function are performed by driving the registers inside the modem element by the control program using the modulation function and the ADPCM codec function built in the facsimile modem element.

It also initializes program memory, multifunction peripherals and facsimile modem devices, converts character information into image information according to font information, and faxes image information according to MH (Modified Huffman) or MR (Modified READ) encoding. The functions of controlling these four facsimile modem elements in real time according to the facsimile communication control procedure and interworking with the service host are implemented by a program embedded in a program (ROM).

By configuring the device as described above, the following effects can be obtained.

First, since service calls of facsimile devices connected to a general telephone network are gathered into the unit by the traffic of the relay line from the nearest local exchange, the facsimile communication processing service, which is a non-voice value-added service, does not increase in the existing telephone network. It can be used as a multi-facsimile line processing circuit pack of a facsimile facsimile communication service connection device that can be implemented.

Second, since a lossless communication path is formed between a facsimile device introduced in a trunk unit in a general telephone network and a device according to the present invention, a typical loss value between a switch and a subscriber preference is 7 dB more than that of a 2-wire general subscriber line facsimile counterpart. SNR (signal-to-noise ratio) or more can be obtained, thereby reducing information errors in transmitting the encoded facsimile information. That is, data transmission errors (indicated by black lines) that occur during communication of the facsimile device can be reduced.

Third, it is advantageous to increase the capacity of the system because circuits necessary for two-wire general telephone line connection (two-wire and four-wire conversion circuits, transformers, lightning protection circuits, etc.) are unnecessary among devices corresponding to the user's facsimile apparatus.

Fourthly, the facsimile machine can perform communication processing service by operating DTMF signals (0 to 9, #, *) according to voice guidance or by using a predetermined database type (using a list of frequently used shortcut numbers) without any additional device. Available.

Claims (1)

Signal conversion circuit pack 12, multiple facsimile line processing circuit pack 13, facsimile service processing circuit pack 14, packet network connection circuit pack 15, facsimile service back circuit pack 16, data service device 17 A facsimile communication processing service connection apparatus comprising: A system bus connecting means 21 for connecting a system bus and a multiple facsimile circuit processing apparatus, and an automatic vector interrupt signal from the system bus connecting means 21 are received through an internal bus, and the signal conversion circuit pack 12 and the TTL are received. A facsimile line processing means 20 for transmitting / receiving a level highway signal, a mode signal, and first and second address signals, and a bus adjusting means connected to the system bus connecting means 21 and the internal bus to perform bus adjustment ( 23, connected to the system bus connecting means 21 and the internal bus through the bus adjusting means 23, interworking with the facsimile service processing circuit pack 14, and a dual port for receiving ADPCM voice information and font information. Memory 22, ROM 26 connected to the internal bus and embedded with multiple control programs in accordance with a facsimile communication control procedure, Stack connected to the internal bus RAM 27 used as an area and a variable data area, a central processing unit 24 connected to the internal bus and controlling an internal bus according to a control program embedded in the ROM 26, and connected to the internal bus. And a data buffer (28) for storing the execution area of the control program and ADPCM voice information and font information. 2. The apparatus of claim 1, wherein the facsimile line processing means (20); 32 particles from the signal conversion connection means 33 and the signal conversion connection means 33 for transmitting and receiving the signal conversion circuit pack 12, the TTL level highway signal, the mode signal, and the first and second address signals. A PCM codec 32 for receiving a buffered TTL level subhighway signal, a synchronization clock, and an address and mode signal, which are subscriber line identification information, for decoding a single subscriber facsimile line signal, and the reception decoded in the PCM codec 32. DTMF decoding means 30, which is connected in parallel with the signal and transmits an interrupt signal when detecting a valid DTMF signal to the internal bus, and is connected to an internal bus and connected to an internal bus for transmission and reception signal decoded by the PCM codec 32. A multi-facsimile line processing apparatus for relay line connection, comprising: a facsimile modem (31) for transmitting an interrupt signal for each control procedure step.