KR960011492A

KR960011492A - Active Matrix Liquid Crystal Display

Info

Publication number: KR960011492A
Application number: KR1019950031884A
Authority: KR
Inventors: 올레그 페드로비치 오구르트소브; 보리스 이바노비치 카주로브
Original assignee: 구자홍; 엘지전자 주식회사
Priority date: 1994-09-26
Filing date: 1995-09-26
Publication date: 1996-04-20
Also published as: RU2118839C1; RU94037146A; KR100205378B1

Abstract

서로 평행한 복수개의 어드레스버스들과 그 어드레스버스에 수직인 복수개의 데이터 버스들과 매트릭스 형태로 배열된 복수개의 화소로 구성된 액티브 매트릭스 액정표시소자가 제공된다. 각 화소는 적어도 하나의 공통 어드레스버스와 두개의 인접한 데이터버스들에 의해 둘러 싸여져 있으며, 서로 떨어진 적어도 두개의 표시전극들과, 인접하는 제1데이터버스와 공통 어드레스 버스와 제1표시전극사이에 연결된 제1스위칭트랜지스터와, 인접하는 제2데이터버스와, 공통 어드레스버스와 제2표시전극사이에 연결된 제2스위칭 트랜지스터와, 제1데이터버스와 제2표시전극사이에 연결된 제1커패시터와, 그리고 제2데이터버스와 제1표시전극사이에 연결된 제2커패시터를 포함한다.An active matrix liquid crystal display device comprising a plurality of address buses parallel to each other, a plurality of data buses perpendicular to the address bus, and a plurality of pixels arranged in a matrix form is provided. Each pixel is surrounded by at least one common address bus and two adjacent data buses, and is connected between at least two display electrodes spaced apart from each other, and between the adjacent first data bus and the common address bus and the first display electrode. A first switching transistor, an adjacent second data bus, a second switching transistor connected between the common address bus and the second display electrode, a first capacitor connected between the first data bus and the second display electrode, and And a second capacitor connected between the second data bus and the first display electrode.

Description

Active Matrix Liquid Crystal Display

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제5도는 본 발명의 일실시예에 따른 액티브 매트릭스 액정표시소자를 나타내는 회로도,5 is a circuit diagram showing an active matrix liquid crystal display device according to an embodiment of the present invention;

제6도는 제5도의 액티브 매트릭스 액정표시소자의 셀을 나타내는 회로도,6 is a circuit diagram showing a cell of the active matrix liquid crystal display device of FIG.

제7도는 본 발명의 다른 실시예에 따른 액티브 매트릭스 액정표시소자의 부분평면도.7 is a partial plan view of an active matrix liquid crystal display device according to another embodiment of the present invention.

Claims

A plurality of address buses parallel to each other, a plurality of data buses perpendicular to the address buses, and a plurality of pixels arranged in a matrix, wherein each pixel is at least one common address bus and two adjacent ones. At least two display electrodes which are surrounded by data buses, which are separated from each other, a first switching transistor connected between an adjacent first data bus and a common address bus and a first display electrode, and an adjacent second data bus; A second switching transistor connected between the common address bus and the second display electrode, a first capacitor connected between the first data bus and the second display electrode, and a second connected between the second data bus and the first display electrode An active matrix liquid crystal display device comprising a capacitor.

A plurality of address buses parallel to each other, a plurality of data buses perpendicular to the address buses, and a plurality of pixels arranged in a matrix form, each pixel having at least two adjacent data buses and two At least two display electrodes enclosed by adjacent address buses of the first and second display electrodes, the first switching transistor connected between the first address bus, the first data bus, and the first display electrode, and the first address bus. A second switching transistor connected between the second data bus and the second display electrode, a third switching transistor connected between the second address bus and the second data bus and the first display electrode, and a second address and the first data. And a fourth switching transistor connected between the bus and the second display electrode.

The display device of claim 1, wherein the first switching transistor has a capacitance C _ds 'between the first data bus and the first display electrode, and a capacitance C _gs ' between the common address bus and the first display electrode. The switching transistor has a capacitance (C _ds ") between the second data bus and the second display electrode, and a capacitance (C _gs ") between the common address bus and the second display electrode, and the first capacitance has a capacitance (C _ad "). The second capacitor has a capacitance (C _ad '), and the relationship of C _ad ' = C _ds "(C _gs ' / C _gs ") and C _ad "= C _ds ' (C _gs " / C _gs ') An active matrix liquid crystal display device having a.

The active matrix liquid crystal display device according to claim 1, wherein the display electrodes at least partially overlap the address bus and the data bus.

3. The active matrix liquid crystal display device according to claim 2, wherein the display electrode at least partially overlaps the address bus and the data bus.

※ Note: The disclosure is based on the initial application.