KR960011465B1 - Fabricating method of phase shift mask - Google Patents
Fabricating method of phase shift mask Download PDFInfo
- Publication number
- KR960011465B1 KR960011465B1 KR1019930010488A KR930010488A KR960011465B1 KR 960011465 B1 KR960011465 B1 KR 960011465B1 KR 1019930010488 A KR1019930010488 A KR 1019930010488A KR 930010488 A KR930010488 A KR 930010488A KR 960011465 B1 KR960011465 B1 KR 960011465B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- phase inversion
- patterned
- manufacturing
- phase shift
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 11
- 230000010363 phase shift Effects 0.000 title abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims abstract description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000001312 dry etching Methods 0.000 claims abstract description 3
- 238000000059 patterning Methods 0.000 claims abstract description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 15
- 235000012721 chromium Nutrition 0.000 claims description 13
- 238000002834 transmittance Methods 0.000 claims description 11
- 229910052804 chromium Inorganic materials 0.000 claims description 10
- 239000011651 chromium Substances 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 9
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 2
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 7
- 238000000151 deposition Methods 0.000 abstract 2
- 230000000694 effects Effects 0.000 description 3
- 241000283973 Oryctolagus cuniculus Species 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 210000005069 ears Anatomy 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
제1도는 종래의 위상반전 마스크 사용상태도.1 is a state diagram of using a conventional phase inversion mask.
제2a도 내지 제2c도는 본 발명에 의한 반도체 제조용 위상반전 마스크를 제조하는 단계를 나타낸 단면도.2A to 2C are cross-sectional views showing steps of manufacturing a phase shift mask for manufacturing a semiconductor according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 석영유리 2 : 크롬1: quartz glass 2: chrome
3 : 위상반전막 4, 11 : 감광막3: phase inversion film 4, 11: photosensitive film
5 : 웨이퍼 10 : 반사막5: wafer 10: reflective film
본 발명은 반도체 소자의 제조공정중 광학적 리소그래피(Optical Lithography) 공정에 사용하기 위한 반도체 제조용 위상반전 마스크 제조방법에 관한 것으로, 특히 위상반전막에 의해 감소되는 투과율을 고려하여 위상반전막이 없는 곳에 얇은 반사막을 만들어서 전체적으로 투과율을 일치시키므로써, 공정마진을 증가시키고 근접 효과에 의한 선폭차이를 감소시킬 수 있는 반도체 제조용 위상반전 마스크를 제조하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for fabricating a phase shift mask for semiconductor manufacturing for use in an optical lithography process during a semiconductor device manufacturing process. In particular, the present invention relates to a thin reflective film in the absence of a phase shift film in consideration of the transmittance reduced by the phase shift film. The present invention relates to a method of manufacturing a phase shift mask for semiconductor manufacturing that can increase the process margin and reduce the line width difference due to the proximity effect by matching the transmittance as a whole.
종래의 기술에 의해 제조된 위상반전 마스크는 위상반전막이 있는 부분과 위상반전막이 없는 부분에서 빛의 투과율의 차이로 인하여, 패턴화할 감광막을 노광시켜 현상하면 비대칭 패턴이 형성된다.The phase inversion mask manufactured by the prior art has an asymmetric pattern when the photosensitive film to be patterned is developed by exposing the photosensitive film to be patterned due to the difference in the transmittance of light in the portion with the phase inversion film and the portion without the phase inversion film.
이를 첨부된 제1도를 참조하여 설명하면, 제1도는 종래의 위상반전 마스크를 사용한 상태를 도시한 것으로, 석영유리(1)의 일측면에 소정의 간격으로 반복 패턴화된 다수의 크롬(2)과 상기 크롬(2)보다 더 넓은 간격으로 상기 크롬(2)상에 패턴화된 위상반전막(3)으로 이루어진 위상반전 마스크를 사용하여, 웨이퍼(5)상에 도포된 패턴화할 감광막(4)을 노광시켜 현상하면, 촛점심도가 최적조건에서 벗어난 조건에서의 패턴단면은 투과율의 차이 및 위상반전막 두께에 의한 초점위치의 변화로 인하여 일명 토끼귀와 같은 비대칭 패턴이 형성됨을 도시한 것이다.Referring to the attached FIG. 1, FIG. 1 illustrates a state using a conventional phase inversion mask, and includes a plurality of chromiums 2 repeatedly patterned at predetermined intervals on one side of the quartz glass 1. ) And a patterned photosensitive film 4 to be coated on the wafer 5, using a phase inversion mask composed of a phase inversion film 3 patterned on the chromium 2 at a wider interval than the chromium 2. ) Is developed by exposing the pattern, the pattern cross section in the condition that the depth of focus is out of the optimum condition, showing that the asymmetrical pattern, such as rabbit ears, is formed due to the difference in transmittance and the change in the focus position due to the phase inversion film thickness.
한편, 하나의 마스크내에 위상반전막에 의한 반복패턴과 기존방식에 의한 고립패턴이 함께 있는 경우, 서로 최적 노광에너지가 다르고, 또한 근접 효과등으로 인하여 선폭차이가 생기고, 이러한 선폭차이는 기존 방식의 마스크에서의 선폭차이보다 크게 나타난다.On the other hand, when the repetition pattern by the phase inversion film and the isolation pattern by the conventional method are together in one mask, the optimum exposure energy is different from each other, and the line width difference occurs due to the proximity effect. It is larger than the line width difference in the mask.
따라서, 본 발명은 상기한 문제점을 해결하기 위하여, 위상반전막에 의해 감소되는 투과율을 고려하여 위상 반전막이 없는 곳에 얇은 반사막을 만들어 전체적으로 투과율을 일치시키므로써, 공정마진을 증가시키고 근접효과 등에 의한 선폭차이를 감소시킬 수 있는 반도체 제조용 위상반전 마스크를 제조하는 방법을 제공함에 그 목적이 있다.Accordingly, in order to solve the above problems, the present invention considers the transmittance reduced by the phase inversion film to make a thin reflective film where there is no phase inversion film to match the overall transmittance, thereby increasing the process margin and increasing the line width due to the proximity effect. It is an object of the present invention to provide a method for manufacturing a phase shift mask for manufacturing a semiconductor that can reduce the difference.
이러한 목적을 달성하기 위한 본 발명은 석영유리(1)의 일측면에 소정의 간격으로 반복 패턴화된 다수의 크롬(2)을 형성하고, 상기 크롬(2)보다 더 넓은 간격으로 상기 크롬(2)상에 패턴화된 위상반전막(3)을 형성하는 반도체 제조용 위상반전 마스크 제조방법에 있어서, 상기 석영유리(1)의 다른 측면에 반사막(10)을 얇게 도포하고, 그 상부에 감광막(11)을 도포한 후에 상기 패턴화된 위상반전막(3)과 반대패턴으로 상기 감광막(11)을 패턴화하는 단계와, 상기 패턴화된 감광막(11)을 사용하여 건식 식각공정으로 노출된 반사막(10)을 제거한 후에 감광막(11)을 현상시키는 단계로 이루어지는 것을 특징으로 한다.The present invention for achieving this object forms a plurality of chromium (2) repeatedly patterned at a predetermined interval on one side of the quartz glass (1), the chromium (2) at a wider interval than the chromium (2) In the method for manufacturing a phase inversion mask for semiconductor manufacturing, wherein the patterned phase inversion film 3 is formed on the film, the reflective film 10 is applied to the other side of the quartz glass 1 thinly, and the photoresist film 11 is formed thereon. Patterning the photoresist film 11 in a pattern opposite to the patterned phase inversion film 3 after the application thereof, and using a patterned photoresist film 11 to expose a reflective film ( After the removal of 10), the photosensitive film 11 is developed.
이하, 본 발명을 첨부된 도면을 참조하여 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제2a도 내지 제2c도는 본 발명에 의한 반도체 제조용 위상반전 마스크를 제조하는 단계를 나타낸 단면도로서, 제2a도는 종래 기술에 의하여 석영유리(1)의 일측면에 소정의 간격으로 반복 패턴화된 다수의 크롬(2)과 상기 크롬(2)보다 더 넓은 간격으로 상기 크롬(2)상에 패턴화된 위상반전막(3)을 형성하는 이루어진 기존의 위상반전 마스크를 도시한 것이다.2A to 2C are cross-sectional views showing a step of manufacturing a phase inversion mask for manufacturing a semiconductor according to the present invention, and FIG. 2A is a plurality of patterns repeatedly repeated at predetermined intervals on one side of the quartz glass 1 according to the prior art. Shows a conventional phase inversion mask made of a chromium (2) and a patterned phase inversion film (3) on the chromium (2) at a wider interval than the chromium (2).
제2b도는 상기 석영유리(1)의 다른측면에 반사막(10)을 얇게 도포하고, 그 상부에 감광막(11)을 도포한 후에 상기 패턴화된 위상반전막(3)과 반대패턴으로 상기 감광막(11)을 패턴화한 상태를 도시한 것이다.FIG. 2B illustrates a thin coating of the reflective film 10 on the other side of the quartz glass 1, and a photosensitive film 11 applied thereon, in a pattern opposite to the patterned phase inversion film 3. 11 shows a patterned state.
제2c도는 상기 패턴화된 감광막(11)을 사용하여 건식 식각공정으로 노출된 반사막(10)을 제거한 후에 감광막(11)을 현상시켜 본 발명의 위상반전 마스크를 제조한 상태를 도시한 것이다.FIG. 2C illustrates a state in which the phase shift mask of the present invention is manufactured by removing the reflective film 10 exposed by the dry etching process using the patterned photosensitive film 11 and then developing the photosensitive film 11.
상기 반사막(10)은 예를들어, SOG 및 PMMA 등을 사용하며, 그 두께는 석영유리(1)를 통해 위상반전막(3)을 통과한 빛의 투과율과 위상차이를 고려하여 반사막(10)이 두께를 설정한다. 즉 석영유리(1)를 통해 위상반전막(3)을 통과한 빛의 투과율과 반사막(10)을 통해 석영유리(1)를 통과한 빛의 투과율을 같게 하고, 또한 서로의 위상차이는 180°로 유지시킨다.For example, the reflective film 10 uses SOG, PMMA, and the like, and the thickness of the reflective film 10 in consideration of the transmittance and the phase difference of the light passing through the phase inversion film 3 through the quartz glass 1 is determined. Set this thickness. That is, the transmittance of the light passing through the phase inversion film 3 through the quartz glass 1 and the light passing through the quartz glass 1 through the reflective film 10 are equal, and the phase difference between each other is 180 °. Keep it at
상술한 바와같이 본 발명에 의하면, 위상반전 마스크내의 반복 패턴지역에 대하여 위상반전막이 없는 곳에 얇은 반사막을 형성시켜 위상반전막이 있는 곳의 투과율과 일치시키므로써, 공정마진을 증가시키고, 결과적으로 반복되는 패턴지역의 투과율을 전체적으로 낮추므로 패턴을 형성하기 위한 최적 에너지는 증가시켜야 하고, 따라서 고립 패턴지역의 에너지도 증가하여 패턴(고립된 선폭) 크기가 작아지므로 기존의 선폭차이를 감소시킬 수 있는 효과가 있다.As described above, according to the present invention, a thin reflective film is formed in the absence of the phase inversion film with respect to the repeating pattern region in the phase inversion mask, thereby matching the transmittance at the position where the phase inversion film is present, thereby increasing the process margin and consequently being repeated. As the transmittance of the pattern region is lowered overall, the optimal energy for forming the pattern should be increased. Therefore, the energy of the isolated pattern region is also increased, so that the size of the pattern (isolated line width) becomes smaller. Therefore, the existing line width difference can be reduced. have.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019930010488A KR960011465B1 (en) | 1993-06-10 | 1993-06-10 | Fabricating method of phase shift mask |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019930010488A KR960011465B1 (en) | 1993-06-10 | 1993-06-10 | Fabricating method of phase shift mask |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR950001941A KR950001941A (en) | 1995-01-04 |
| KR960011465B1 true KR960011465B1 (en) | 1996-08-22 |
Family
ID=19357149
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019930010488A KR960011465B1 (en) | 1993-06-10 | 1993-06-10 | Fabricating method of phase shift mask |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR960011465B1 (en) |
-
1993
- 1993-06-10 KR KR1019930010488A patent/KR960011465B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR950001941A (en) | 1995-01-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH07209851A (en) | Lithographic exposure mask and its manufacture | |
| KR20020074546A (en) | Phase shifting mask for manufacturing semiconductor device and fabricating method thereof | |
| KR0128827B1 (en) | Fabrication method of phase shift mask | |
| KR0127662B1 (en) | Method for fabricating phase shift mask of semiconductor device | |
| KR100295049B1 (en) | Method for manufacturing phase shift masks | |
| JPH07287386A (en) | Phase shift mask and its manufacture | |
| KR960011465B1 (en) | Fabricating method of phase shift mask | |
| KR100192360B1 (en) | Method of manufacturing phase shift mask | |
| KR100314743B1 (en) | Method of preparing phase shift mask of semiconductor device | |
| KR20020051109A (en) | Method for fabricating half-tone mask | |
| KR20020001230A (en) | A method for manufacturing phase shift mask of semiconductor device | |
| JP3998756B2 (en) | Phase inversion mask and manufacturing method thereof | |
| KR940005608B1 (en) | Method of making mask of phase shift | |
| KR0127660B1 (en) | Method for fabricating phase shift mask of semiconductor device | |
| KR0152952B1 (en) | Phase shift mask and preparation process thereof | |
| KR0147468B1 (en) | Method for forming pattern during manufacturing semiconductor device | |
| JP2681610B2 (en) | Method for manufacturing lithographic mask | |
| KR970006722B1 (en) | Phase shift mast and fabrication method | |
| KR20020058287A (en) | Manufacturing method for phase shift of semiconductor device | |
| KR0127659B1 (en) | Method for fabricating phase shift mask of semiconductor device | |
| KR0166846B1 (en) | Mask for semiconductor and the manufacturing method | |
| KR100524630B1 (en) | Selective attenuated phase shifting mask and its manufacturing method | |
| KR0185785B1 (en) | Method of manufacturing phase shift mask | |
| KR100419971B1 (en) | Mask for forming pattern in fabricating semiconductor device and fabricating method thereof | |
| JPH0659432A (en) | Mask for exposing and exposing method using the mask |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| G160 | Decision to publish patent application | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20100726 Year of fee payment: 15 |
|
| LAPS | Lapse due to unpaid annual fee |