KR960009808B1 - Coefficient updating circuit for adaptive channel equalizer - Google Patents

Coefficient updating circuit for adaptive channel equalizer Download PDF

Info

Publication number
KR960009808B1
KR960009808B1 KR93019074A KR930019074A KR960009808B1 KR 960009808 B1 KR960009808 B1 KR 960009808B1 KR 93019074 A KR93019074 A KR 93019074A KR 930019074 A KR930019074 A KR 930019074A KR 960009808 B1 KR960009808 B1 KR 960009808B1
Authority
KR
South Korea
Prior art keywords
coefficient
latch
reception signal
signal storage
channel
Prior art date
Application number
KR93019074A
Other languages
Korean (ko)
Other versions
KR950010510A (en
Inventor
Sang-Ki Lee
Original Assignee
Lg Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Electronics Inc filed Critical Lg Electronics Inc
Priority to KR93019074A priority Critical patent/KR960009808B1/en
Publication of KR950010510A publication Critical patent/KR950010510A/en
Application granted granted Critical
Publication of KR960009808B1 publication Critical patent/KR960009808B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03159—Arrangements for removing intersymbol interference operating in the frequency domain
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H2017/0072—Theoretical filter design
    • H03H2017/0081—Theoretical filter design of FIR filters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Filters That Use Time-Delay Elements (AREA)

Abstract

The circuit includes a reception signal storage(1), a latch(2) for sampling an error signal, a controller(3) for controlling the reception signal storage(1) and latch(2), a updating value calculating unit(4) for operating the outputs of the reception signal storage(1) and latch(2) to generate an updating coefficient, an adder(6) for adding the output of the updating value calculating unit(4) and previous filter coefficient to generate a new filter coefficient, a channel index generator(5) for decoding a channel signal, a dual port RAM(7) for storing N coefficients when the adder(6) outputs a previous channel coefficient, and an address generator(8) for generating addresses to the dual port RAM(7) and a limited impulse response filter(10).
KR93019074A 1993-09-20 1993-09-20 Coefficient updating circuit for adaptive channel equalizer KR960009808B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR93019074A KR960009808B1 (en) 1993-09-20 1993-09-20 Coefficient updating circuit for adaptive channel equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93019074A KR960009808B1 (en) 1993-09-20 1993-09-20 Coefficient updating circuit for adaptive channel equalizer

Publications (2)

Publication Number Publication Date
KR950010510A KR950010510A (en) 1995-04-28
KR960009808B1 true KR960009808B1 (en) 1996-07-24

Family

ID=19364053

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93019074A KR960009808B1 (en) 1993-09-20 1993-09-20 Coefficient updating circuit for adaptive channel equalizer

Country Status (1)

Country Link
KR (1) KR960009808B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008056871A1 (en) * 2006-11-06 2008-05-15 Samsung Electronics Co., Ltd. Adaptive equalizer and adaptive equalization method

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100585638B1 (en) * 1998-12-31 2006-09-06 엘지전자 주식회사 Modulator of High Speed Communication System
KR100617778B1 (en) * 1999-07-07 2006-08-28 삼성전자주식회사 Appasratus and method for compensating degradation of a received signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008056871A1 (en) * 2006-11-06 2008-05-15 Samsung Electronics Co., Ltd. Adaptive equalizer and adaptive equalization method

Also Published As

Publication number Publication date
KR950010510A (en) 1995-04-28

Similar Documents

Publication Publication Date Title
US4792915A (en) Non linear adaptive filters
US4064379A (en) Logarithmic echo canceller
EP0971174A3 (en) Kitchen appliance
GB2111354A (en) Echo canceller
SE9301184L (en) Ways to perform convergence in an echo suppressor with adaptive filters
CA2168335A1 (en) Virtual addressing buffer circuit
CA2020804C (en) Adaptive echo canceller
CA2183118A1 (en) Subband Acoustic Echo Canceller
CA2249283A1 (en) Acoustic feedback correction
AU569977B2 (en) Adaptive echo canceller
JPS62294315A (en) Adaptive filter
CA2073082A1 (en) Fractionally spaced cross-polarization interference canceller
KR960009808B1 (en) Coefficient updating circuit for adaptive channel equalizer
US5440583A (en) Decision feedback equalizer with second-order recursive filter controlled with two feedback coefficients
EP0732838A2 (en) Acoustic echo cancellor
JPH088691A (en) Method and device for adapting adaptive filter
CA2142387A1 (en) Echo Canceller
CA2141272A1 (en) Signal Reception System Comprising an Adaptive Filter
TW200412728A (en) Noise matching for echo cancellers
US4931980A (en) Digital computing device for a data transmission installation using code 2B 1Q or the like
JPS572115A (en) Digital filter device
JPS62265824A (en) Echo canceller for bidirectional digital transmission
MY110395A (en) Iir ghost cancelling system
CN100469082C (en) Echo preventing circuit and digital signal processing circuit
JP3310113B2 (en) Echo canceller

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20060616

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee