KR960009607A - Vertical Sync Stabilizer for Multi-System TV - Google Patents

Vertical Sync Stabilizer for Multi-System TV Download PDF

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Publication number
KR960009607A
KR960009607A KR1019940021264A KR19940021264A KR960009607A KR 960009607 A KR960009607 A KR 960009607A KR 1019940021264 A KR1019940021264 A KR 1019940021264A KR 19940021264 A KR19940021264 A KR 19940021264A KR 960009607 A KR960009607 A KR 960009607A
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KR
South Korea
Prior art keywords
signal
circuit
vertical
chroma
detecting
Prior art date
Application number
KR1019940021264A
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Korean (ko)
Inventor
민기식
Original Assignee
배순훈
대우전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 배순훈, 대우전자 주식회사 filed Critical 배순훈
Priority to KR1019940021264A priority Critical patent/KR960009607A/en
Publication of KR960009607A publication Critical patent/KR960009607A/en

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Abstract

본 발명은 다중시스템의 텔레비젼에서 동기신호의검출이 완전치 못한 경우에 발생되는 화면의 흔들림 현상을 제거하기 위한 수직동기 안정화 장치에 관한 것으로 방송을 선국하기 위한 튜너(1)와 선국된 방송신호로부터 영상 및 음성의 중간주파신호를 검출하는 IF회로(2), 이 IF회로(2)의 영상 중간주파신호를 근거로 화면상에 출력될 영상신호 및 수직편향신호를 생성하는 크로마IC(3) 이 크로마IC(3)로부터의 R, G, B신호와 휘도신호에 따라 CRT를 구동하는 CRT구동회로(4), CRT의 수직편향요크로 편향신호를 인가하는 수직편향회로(5), 상기 IF회로(2)에서 출력되는 영상신호로부터 동기신호를 검출하는 동기 분리회로(6), 이 동기 분리회로(6)에서 검출된 동기신호의 레벨을 검출하는 감지부(7), 상기 동기 분리회로(6)에서 검출된 수직동기신호의 주파수를 저장한 메모리(8), 상기 감지부(7)의 검출결과에 따라 상기 메모리(8)에 저장된 수직동기 신호의 주파수를 크로마IC(3) 및 상기 수직편향회로(5)에 인가하는 마이크로 컴퓨터(9)를 포함하여 구성된다.The present invention relates to a vertical synchronization stabilization device for eliminating the shaking of the screen generated when the detection of the synchronization signal is not complete in a television of a multi-system, from a tuner (1) for tuning broadcast and a tuned broadcast signal. IF circuit 2 for detecting the intermediate frequency signal of video and audio, and chroma IC 3 for generating the image signal and vertical deflection signal to be output on the screen based on the image intermediate frequency signal of the IF circuit 2 A CRT driving circuit 4 for driving the CRT according to the R, G, and B signals and the luminance signal from the chroma IC 3, a vertical deflection circuit 5 for applying a deflection signal to the vertical deflection yoke of the CRT, and the IF circuit A synchronous separation circuit 6 for detecting a synchronous signal from the video signal output from (2), a sensing unit 7 for detecting the level of the synchronous signal detected by the synchronous separation circuit 6, and the synchronous separation circuit 6 The frequency of the vertical sync signal detected by The microcomputer 9 for applying the frequency of the vertical synchronization signal stored in the memory 8 to the chroma IC 3 and the vertical deflection circuit 5 according to the detection result of the memory 8 and the sensing unit 7. It is configured to include.

Description

다중시스템 텔레비젼의 수직동기 안정화 장치Vertical Sync Stabilizer for Multi-System TV

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 1실시예에 따른 다중시스템 텔레비젼의 수직동기 안정화 장치.1 is a vertical synchronization stabilization apparatus for a multi-system television according to an embodiment of the present invention.

Claims (1)

방송을 선국하기 위한 튜너(1)와 선국된 방송신호로부터 영상 및 음성의 중간주파신호를 검출하는 IF회로(2), 상기 IF회로(2)의 영상 중간주파신호를 근거로 화면상에 출력될 영상신호 및 수직편향신호를 생성하는 크로마IC(3), 상기 크로마IC(3)로부터의 R, G, B신호와 휘도신호에 따라 CRT를 구동하는 CRT구동회로(4), CRT의 수직편향요크로 편향신호를 인가하는 수직편향회로(5), 상기 IF회로(2)에서 출력되는 영상신호로부터 동기신호를 검출하는 동기 분리회로(6), 상기 동기 분리회로(6)에서 검출된 동기신호의 레벨을 검출하는 감지부(7), 상기 동기 분리회로(6)에서 검출된 수직동기신호의 주파수를 저장한 메모리(8), 상기 감지부(7)의 검출결과에 따라 상기 메모리(8)에 저장된 수직동기 신호의 주파수를 크로마IC(3) 및 상기 수직편향회로(5)에 인가하는 마이크로 컴퓨터(9)를 포함하여 구성된 것을 특징으로 하는 다중시스템 텔레비젼의 수직동기 안정화 장치.An IF circuit (2) for detecting an intermediate frequency signal of video and audio from a tuner (1) for tuning broadcasting and a tuned broadcast signal, and being output on the screen based on the image intermediate frequency signal of the IF circuit (2). A chroma IC 3 for generating a video signal and a vertical deflection signal, a CRT driving circuit 4 for driving a CRT according to the R, G, and B signals and a luminance signal from the chroma IC 3, and a vertical deflection yoke of the CRT. A vertical deflection circuit 5 for applying a deflection signal to the circuit, a synchronous separation circuit 6 for detecting a synchronous signal from the image signal output from the IF circuit 2, and a synchronization signal detected by the synchronous separation circuit 6 A detection unit 7 for detecting a level, a memory 8 storing a frequency of a vertical synchronization signal detected by the synchronization separation circuit 6, and a memory 8 according to a detection result of the detection unit 7; Micro to apply the frequency of the stored vertical synchronization signal to the chroma IC (3) and the vertical deflection circuit (5) Vertical synchronization stabilization apparatus for a multi-system television, comprising a computer (9). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940021264A 1994-08-27 1994-08-27 Vertical Sync Stabilizer for Multi-System TV KR960009607A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940021264A KR960009607A (en) 1994-08-27 1994-08-27 Vertical Sync Stabilizer for Multi-System TV

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940021264A KR960009607A (en) 1994-08-27 1994-08-27 Vertical Sync Stabilizer for Multi-System TV

Publications (1)

Publication Number Publication Date
KR960009607A true KR960009607A (en) 1996-03-22

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ID=66686652

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940021264A KR960009607A (en) 1994-08-27 1994-08-27 Vertical Sync Stabilizer for Multi-System TV

Country Status (1)

Country Link
KR (1) KR960009607A (en)

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