KR960007567B1 - Variable phase transferring apparatus - Google Patents

Variable phase transferring apparatus Download PDF

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Publication number
KR960007567B1
KR960007567B1 KR1019920018398A KR920018398A KR960007567B1 KR 960007567 B1 KR960007567 B1 KR 960007567B1 KR 1019920018398 A KR1019920018398 A KR 1019920018398A KR 920018398 A KR920018398 A KR 920018398A KR 960007567 B1 KR960007567 B1 KR 960007567B1
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South Korea
Prior art keywords
pass filter
switching means
coil
capacitor
phase shifter
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KR1019920018398A
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Korean (ko)
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KR940010517A (en
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홍성훈
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배순훈
대우전자주식회사
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Publication of KR940010517A publication Critical patent/KR940010517A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/18—Networks for phase shifting
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01—Frequency selective two-port networks
    • H03H7/0115—Frequency selective two-port networks comprising only inductors and capacitors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01—Frequency selective two-port networks
    • H03H7/17—Structural details of sub-circuits of frequency selective networks
    • H03H7/1741—Comprising typical LC combinations, irrespective of presence and location of additional resistors
    • H03H7/1766—Parallel LC in series path

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Networks Using Active Elements (AREA)

Abstract

The adjustable circuit phase shifter includes switching MESFETs(T1, T2, T3) that use a gate linked to a bias resistance (Rb) that supplies input voltage (Va) and protects high frequency leakage. By setting 0 V to a control voltage (Vq) to make switching MESFET(T1 and T3)s "on" to a high frequency pass filter and (Vq) > Vpinchoff to make them "off" to a low frequency pass filter respectively, the circuit reduces limit of operation band. Duality of a high-pass filter and a low-pass filter in a 180= phase shifter reduces effect of coils which have large size by using same coil (L1, L2).

Description

가변회로 위상기Variable Circuit Phaser

제1도는 종래 기술의 회로 구성도.1 is a circuit diagram of a prior art.

제2도는 본 발명에 따른 일실시예시도.2 is an embodiment according to the present invention.

제3도 및 제4도는 본 발명의 동작상태도.3 and 4 are operational state diagrams of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

C1, C2 : 콘덴서 L1, L2 : 코일C1, C2: condenser L1, L2: coil

T1 내지 T3 : MESFET Rb: 바이어스 저항T1 to T3: MESFET R b : Bias Resistor

VQ: 제어 전압V Q : control voltage

본 발명은 저역통과 및 고역통과 여파기를 사용하는 가변회로 위상기에 관한 것이다.The present invention relates to a variable circuit phase shifter using lowpass and highpass filters.

제1도를 통하여 종래 기술을 살펴보면, 제1도는 종래 기술에 따른 가변회로 위상기의 구성도로서, 1과 2의 SPDT(Single Pole Double Throw)스위치, 3은 저역 통과 필터, 4는 고역통과 필터를 각각 나타낸다.Referring to the prior art through FIG. 1, FIG. 1 is a configuration diagram of a variable circuit phase shifter according to the prior art, wherein a single pole double throw (SPDT) switch of 1 and 2, 3 is a low pass filter, and 4 is a high pass filter. Respectively.

도면에 도시한 종래의 가변회로 위상기는 기본적으로 2개의 SPDT 스위치(12,)와, 저역통과 여파기(3), 그리고 고역통과 여파기(4)로 구성되며, 고역통과 여파기(4)는 위상 앞섬을, 그리고 저역통과 여파기(3)는 위상 뒤짐을 발생시킨다.The conventional variable circuit phaser shown in the figure basically consists of two SPDT switches 12, a lowpass filter 3, and a highpass filter 4, and the highpass filter 4 has a phase leading edge. And the lowpass filter (3) generates a phase retardation.

그러나, 상기와 같은 종래 기술은 SPDT 스위치 때문에 전체 회로의 삽입 손실이 증대되고, 동작대역이 제한되며, 전체 회로 부피가 증가하는 문제점이 있었다.However, the prior art as described above has a problem that the insertion loss of the entire circuit is increased, the operating band is limited, and the total circuit volume is increased because of the SPDT switch.

따라서, 본 발명의 목적은 종래 기술에서 이용되는 SPDT 스위치를 제거하여 삽입손실과 동작대역 제한 및 부피증가의 문제점을 해결하도록 구성된 가변회로 위상기를 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a variable circuit phase shifter configured to solve the problems of insertion loss, operating band limitation, and volume increase by removing the SPDT switch used in the prior art.

상기 목적을 달성하기 위하여 본 발명은, 입력단에 연결된 제1콘덴서와, 상기 제1콘덴서와 출력단 사이에 연결되는 제1스위칭 수단과, 입력단에 연결된 제1코일과, 상기 제1코일과 출력단 사이에 연결된 제2코일과, 상기 제1 및 제2코일의 접속점과 접지 사이에 연결되는 제2콘덴서와, 상기 제2콘덴서에 병렬로 연결되는 제2 및 제3 스위칭 수단을 구비한 것을 특징으로 한다.In order to achieve the above object, the present invention provides a first capacitor connected to an input terminal, a first switching means connected between the first capacitor and an output terminal, a first coil connected to an input terminal, and between the first coil and the output terminal. And a second coil connected to the second coil, a second capacitor connected between the connection points of the first and second coils, and a ground, and second and third switching means connected in parallel to the second capacitor.

이하, 첨부된 제2도를 참조하여 본 발명의 일실시예를 상세히 설명한다.Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 2.

제2도는 본 발명의 일실시예에 따른 회로 구성도로서, 도면에서 C1과 C2는 콘덴서, L1과 L2는 코일, Rb는 바이어스 저항, T1 내지 T3는 MESFET를 각각 나타낸다.Second turn as a circuit configuration according to one embodiment of the invention, C1 and C2 in the figure are capacitors, L1 and L2 are coils, R b is a bias resistance, T1 to T3 indicates a MESFET, respectively.

도면에 도시한 바와 같이 본 발명은, 입력단에 연결된 제1콘덴서(C1)와, 상기 제1콘덴서(C1)에 일단이 연결되고 타단은 출력단에 연결되는 제1스위칭 수단(T1)과, 입력단에 연결된 제1코일(L1)과, 상기 제1코일(L1)에 일단이 연결되고, 타단은 출력단에 연결된 제2코일(L2)과, 상기 제1코일(L1) 및 제2코일(L2)의 접속점이 일단이 연결되고 타단은 접지된 제2콘덴서(C2)와, 상기 제2콘덴서(C2)와 병렬로 연결된 제2 및 제3 스위칭 수단(T2, T3)과 상기 제1, 제2 및 제3스위칭 수단(T1 내지 T3)의 제어단에 연결되어 동작 전압(VQ)를 제공하는 바이어스 저항(Rb)를 구비하였다.As shown in the drawing, the present invention includes a first capacitor C1 connected to an input terminal, a first switching means T1 connected at one end to the first capacitor C1 and an output terminal at the other end, and an input terminal. One end of the first coil L1 connected to the first coil L1 and the other end of the second coil L2 connected to the output terminal, and the first coil L1 and the second coil L2 A second capacitor C2 whose one end is connected and the other end is grounded, second and third switching means T2 and T3 connected in parallel with the second capacitor C2 and the first, second and first It was provided with a bias resistor R b connected to the control stage of the three switching means T1 to T3 to provide an operating voltage V Q.

여기서, 상기 스위칭 수단(T1, T2, T3)는 MESFET로 구성되어 제어단으로 게이트 단자를 이용하며, 상기 MESFET들(T1 내지 T3)의 게이트 단자에 각각 연결된 바이어스 저항(Rb)는 동작전압(VQ)을 제공함은 물론 고주파 누설방지 기능을 수행한다.Here, the switching means (T1, T2, T3) is composed of a MESFET using a gate terminal as a control terminal, the bias resistor (Rb) connected to the gate terminals of the MESFETs (T1 to T3), respectively, the operating voltage (VQ) ), As well as high frequency leakage protection.

상기와 같이 구성되는 본 발명의 동작 및 그에 따른 효과를 제3도 및 제4도를 통하여 살펴보면, 제3도는 스위칭 수단(T1 내지 T3)의 ON에 따른 작용상태도, 제4도는 스위칭 수단(T1 내지 T3)의 OFF에 따른 작용상태도로서, 도면에서 RON은 스위칭 수단(T1 내지 T3)의 ON에 따른 내부 저항, COFF는 스위칭 수단(T1 내지 T3)의 OFF에 따른 내부 캐패시터를 각각 나타낸다.Looking at the operation and the effects of the present invention configured as described above with reference to Figures 3 and 4, Figure 3 is an operating state diagram according to the ON of the switching means (T1 to T3), Figure 4 is a switching means T1 To T3), R ON denotes an internal resistance according to ON of switching means T1 to T3, and C OFF denotes an internal capacitor according to OFF of switching means T1 to T3.

도면에서와 같이, 스위칭 수단인 MESFET(T1 내지 T3)의 ON 상태(VQ=OV)와 OFF 상태(|VG| |Vpinchoff|)에 따른 등가회로를 간단하게 RON의 저항과 COFF캐패시터로 표현한다면, 제어 전압 VQ에 따라 저역통과 또는 고역통과 여파기 특성을 구현해낼 수 있다.As shown in the figure, the switching means of MESFET (T1 to T3) in the ON state (V Q = OV) and OFF state (| V G | | V pinchoff |) simply an equivalent circuit to R ON resistance and C OFF in accordance with the In terms of capacitors, low-pass or high-pass filters can be implemented depending on the control voltage V Q.

먼저, VQ=OV가 되어 MESFET(T1 내지 T3)가 ON 상태가 되면 제3도의 (a)와 같은 등가회로를 얻게되고, 여기서, RON1내지 RON3가 충분히 작다면 제3도의 (b)와 같은 1단 고역통과 여파기를 얻을 수 있게 된다.First, when V Q = OV and the MESFETs T1 to T3 are turned ON, an equivalent circuit as shown in FIG. 3A is obtained, and if R ON1 to R ON3 are sufficiently small, FIG. A single stage highpass filter such as

그 다음에, VQ가 Vpinchoff보다 큰 전압일 때, MESFET(T1 내지 T3)들은 COFF로 표현되어 제4도의 (a)와 같은 등가회로로 표현될 수 있으며, 여기서 COFF1이 충분히 작아서 상위 경로(C1경로)에 대한 임피던스가 크다면 제4도의 (b)와 같은 저역통과 여파기를 얻게 된다.Then, when V Q is a voltage greater than V pinchoff , the MESFETs T1 to T3 can be represented by C OFF and represented by an equivalent circuit as shown in Figure 4 (a), where C OFF1 is small enough so that If the impedance for the path (C 1 path) is large, a lowpass filter such as (b) of FIG. 4 is obtained.

따라서, 상기와 같이 구성되어 동작하는 본 발명은 SPDT 스위치의 기능은 여파기 내부에서 흡수하는 새로운 구조의 180°가변회로 위상기로 동작하므로, SPDT 스위치에 의해 발생하는 삽입손실 증가, 등작대역 제한과 전체회로 면적을 증가를 줄일 수 있게 된다. 즉 180°위상기에서의 저역통과 여파기와 고역통과 여파기의 이원성(duality)에 따라 동일한 코일(L1, L2)를 가지고 각각의 여파기를 구성할 수 있기 때문에 비교적 큰 면적을 차지하는 코일에 따른 영향을 줄일 수 있다.Therefore, in the present invention configured and operated as described above, the function of the SPDT switch operates as a 180 ° variable circuit phase with a new structure absorbing inside the filter, so that the insertion loss caused by the SPDT switch is increased, the equivalent bandwidth limitation and the whole circuit The area can be reduced. In other words, each filter can be configured with the same coil (L1, L2) according to the duality of the low pass filter and the high pass filter in the 180 ° phase, thereby reducing the influence of the coil having a relatively large area. Can be.

Claims (3)

가변회로 위상기에 있어서, 입력단에 연결된 제1콘덴서(C1)와, 상기 제1콘덴서(C1)와 출력단 사이에 연결되는 제1스위칭 수단(T1)과, 입력단에 연결된 제1코일(L1)과, 상기 제1코일(L1)과 출력단 사이에 연결된 제2코일(L2)과, 상기 제1 및 제2코일(L1, L2)의 접속점과 접지 사이에 연결된 제2콘덴서(C2)와, 상기 제2콘덴서(C2)와 병렬로 연결된 제2 및 제3 스위칭 수단(T2, T3)을 구비한 것을 특징으로 하는 가변 회로 위상기.In the variable circuit phaser, a first capacitor C1 connected to an input terminal, a first switching means T1 connected between the first capacitor C1 and an output terminal, a first coil L1 connected to an input terminal, A second coil L2 connected between the first coil L1 and an output terminal, a second capacitor C2 connected between a connection point of the first and second coils L1 and L2, and a ground; And a second and third switching means (T2, T3) connected in parallel with the capacitor (C2). 제1항에 있어서, 상기 제1 내지 제3스위칭 수단(T1 내지 T3)은 MESFET로 구성한 것을 특징으로 하는 가변회로 위상기.The variable circuit phase shifter according to claim 1, wherein the first to third switching means (T1 to T3) are constituted by MESFETs. 제1항에 있어서, 상기 스위칭 수단(T1 내지 T3)은 고주파 누설방지를 위하여 제어단에 연결되는 바이어스 저항(Rb)를 더 포함하여 구성되는 것을 특징으로 하는 가변회로 위상기.The variable circuit phase shifter as claimed in claim 1, wherein the switching means (T1 to T3) further comprises a bias resistor (R b ) connected to a control terminal for preventing high frequency leakage.
KR1019920018398A 1992-10-07 1992-10-07 Variable phase transferring apparatus KR960007567B1 (en)

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Application Number Priority Date Filing Date Title
KR1019920018398A KR960007567B1 (en) 1992-10-07 1992-10-07 Variable phase transferring apparatus

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Application Number Priority Date Filing Date Title
KR1019920018398A KR960007567B1 (en) 1992-10-07 1992-10-07 Variable phase transferring apparatus

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KR940010517A KR940010517A (en) 1994-05-26
KR960007567B1 true KR960007567B1 (en) 1996-06-05

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KR1019920018398A KR960007567B1 (en) 1992-10-07 1992-10-07 Variable phase transferring apparatus

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