KR950030616A - Clock Switching Circuit of Satellite Receiver - Google Patents

Clock Switching Circuit of Satellite Receiver Download PDF

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Publication number
KR950030616A
KR950030616A KR1019940007650A KR19940007650A KR950030616A KR 950030616 A KR950030616 A KR 950030616A KR 1019940007650 A KR1019940007650 A KR 1019940007650A KR 19940007650 A KR19940007650 A KR 19940007650A KR 950030616 A KR950030616 A KR 950030616A
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KR
South Korea
Prior art keywords
clock
screen display
signal
mode selection
selection signal
Prior art date
Application number
KR1019940007650A
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Korean (ko)
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KR0125469B1 (en
Inventor
이갑수
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019940007650A priority Critical patent/KR0125469B1/en
Publication of KR950030616A publication Critical patent/KR950030616A/en
Application granted granted Critical
Publication of KR0125469B1 publication Critical patent/KR0125469B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/90—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for satellite broadcast receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/06—Generation of synchronising signals

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronizing For Television (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

본 발명은 위성수신장치의 클럭스위칭회로에 관한 것으로, 둘 이상의 방송방식을 수신할 수 있는 위성수신장치의 온스크린디스플레이부에서, 방송방식에 따라 수신되는 영상신호와 온스크린디스플레이신호의 동기를 일치시켜 주기 위한 해당 클럭을 선택함에 있어서, 종래에 사용된 스위칭 집적회로가 아닌, 하나가 온 되면 다른 하나는 오프되는 스위칭동작을 하는 트랜지스터의 동작에 의해 선택함으로써, 원가절감과 소자를 구성하는 연결선이 짧아짐으로인해 필요없이 발생하는 전파를 줄일 수 있는 잇점이 있다.The present invention relates to a clock switching circuit of a satellite receiver, in which an on-screen display unit of a satellite receiver capable of receiving two or more broadcast methods matches the synchronization of a video signal and an on-screen display signal received according to the broadcast method. In selecting the corresponding clock to be used, the connection line constituting the element can be reduced by selecting the operation of the transistor which performs the switching operation when one is turned on and the other is turned off, rather than a conventionally used switching integrated circuit. Shortening has the advantage of reducing the needless propagation.

Description

위성수신장치의 클럭스위칭회로Clock Switching Circuit of Satellite Receiver

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래의 위성수신장치의 온스크린디스플레이부 클럭스위칭회로, 제2도는 본 발명의 바람직한 일 실시예에 따른 위성수신장치의 온스크린디스플레이부의 클럭스위칭회로.1 is a clock switching circuit of an on-screen display unit of a conventional satellite receiver, and FIG. 2 is a clock switching circuit of an on-screen display unit of a satellite receiver according to an embodiment of the present invention.

Claims (5)

제1텔레비젼 방송방식의 영상신호와 제2텔레비젼 방송방식의 영상신호를 모두 수신할 수 있는 위성수신장치에 있어서, 수신된 영상신호와 방송방식선택신호를 입력받아 영상신호에 문자데이타신호를 실어서 출력하는 온스크린디스플레이부; 제1텔레비젼 방송방식의 영상신호와 문자데이타신호의 동기를 일치시켜 주기 위한 클럭을 발생하는 제1클럭발생부; 제2텔레비젼 방송방식의 영상신호와 온스크린디스플레이신호의 동기를 일치시켜 주기 위한 클럭을 발생하는 제2클럭발생부; 상기 방송방식에 따라 상기 제1클럭발생부와 상기 제2클럭발생부로부터 발생되는 클럭들 중 어느 하나를 상기 온스크린디스플레이부로 출력하도록 제어하는 제어부를 포함하는 것을 특징으로 하는 위성수신장치.A satellite receiver capable of receiving both a first television broadcast signal and a second television broadcast signal, comprising receiving a received video signal and a broadcast method selection signal and loading a text data signal on the video signal. An on-screen display unit for outputting; A first clock generator for generating a clock for synchronizing the video signal of the first television broadcasting system with the text data signal; A second clock generator for generating a clock for synchronizing the synchronization of the video signal of the second television broadcasting system with the on-screen display signal; And a controller for controlling one of the clocks generated by the first clock generator and the second clock generator to be output to the on-screen display unit according to the broadcasting method. 제1항에 있어서, 상기 제어부는 상기 방송방식선택신호가 제1방송방식선택신호이면, 상기 제2클럭발생부롤부터 상기 온스크린디스플레이부로 공급되는 클럭을 차단시키는 제1차단부; 및 상기 방송방식선택신호가 제2방송방식선택신호이면, 상기 제1클럭발생부로부터 상기 온스크린디스플레이부로 공급되는 클럭을 차단시키는 제2차단부를 구비하는 것을 특징으로 하는 위성수신장치.The display apparatus of claim 1, wherein the control unit comprises: a first blocking unit to block a clock supplied from the second clock generation unit to the on-screen display unit when the broadcast mode selection signal is a first broadcast mode selection signal; And a second blocking unit for blocking a clock supplied from the first clock generator to the on-screen display unit if the broadcast mode selection signal is a second broadcast mode selection signal. 제2항에 있어서, 상기 제1차단부는 상기 방송방식선택신호를 인가받는 베이스와 제2클럭발생부의 클럭을 인가받는 콜렉터를 갖으며, 방송방식선택신호에 따라 상기 온스크린디스플레이부로 클럭을 공급하거나 차단시키는 트랜지스터를 구비함을 특징으로 하는 위성수신장치.The method of claim 2, wherein the first blocking unit has a base to which the broadcast mode selection signal is applied and a collector to receive the clock of the second clock generation unit, and supplies a clock to the on-screen display unit according to a broadcast mode selection signal. And a transistor for blocking the satellite receiver. 제2항에 있어서, 상기 제2차단부는 상기 방송방식선택신호를 인가받는 베이스와 제1클럭발생부의 클럭을 인가받는 콜렉터를 갖으며, 방송방식선택신호에 따라 상기 온스크린디스플레이부로 클럭을 공급하거나 차단시키는 트랜지스터를 구비함을 특징으로 하는 위성수신장치.The method of claim 2, wherein the second blocking unit has a base to which the broadcast mode selection signal is applied and a collector to receive the clock of the first clock generation unit, and supplies a clock to the on-screen display unit according to a broadcast mode selection signal. And a transistor for blocking the satellite receiver. 제3항 또는 제4항에 있어서, 상기 트랜지스터들은 하나가 온되면 다른 하나는 오프되는 것을 특징으로 하는 위성수신장치.5. The satellite receiver as claimed in claim 3 or 4, wherein the transistors are turned off when one is on. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940007650A 1994-04-12 1994-04-12 Clock switching circuit of satellite receiver KR0125469B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940007650A KR0125469B1 (en) 1994-04-12 1994-04-12 Clock switching circuit of satellite receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940007650A KR0125469B1 (en) 1994-04-12 1994-04-12 Clock switching circuit of satellite receiver

Publications (2)

Publication Number Publication Date
KR950030616A true KR950030616A (en) 1995-11-24
KR0125469B1 KR0125469B1 (en) 1997-12-19

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ID=19380893

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940007650A KR0125469B1 (en) 1994-04-12 1994-04-12 Clock switching circuit of satellite receiver

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Publication number Publication date
KR0125469B1 (en) 1997-12-19

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