KR950009733A - How to extend the service life of nonvolatile memory chips - Google Patents

How to extend the service life of nonvolatile memory chips Download PDF

Info

Publication number
KR950009733A
KR950009733A KR1019930019967A KR930019967A KR950009733A KR 950009733 A KR950009733 A KR 950009733A KR 1019930019967 A KR1019930019967 A KR 1019930019967A KR 930019967 A KR930019967 A KR 930019967A KR 950009733 A KR950009733 A KR 950009733A
Authority
KR
South Korea
Prior art keywords
returning
block
alarm
nonvolatile memory
writes
Prior art date
Application number
KR1019930019967A
Other languages
Korean (ko)
Other versions
KR960003401B1 (en
Inventor
백영식
오현주
Original Assignee
양승택
재단법인 한국전자통신연구소
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 양승택, 재단법인 한국전자통신연구소 filed Critical 양승택
Priority to KR1019930019967A priority Critical patent/KR960003401B1/en
Publication of KR950009733A publication Critical patent/KR950009733A/en
Application granted granted Critical
Publication of KR960003401B1 publication Critical patent/KR960003401B1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

본 발명은 쓰기 횟수 제한이 있는 비휘발성 메모리 칩의 사용기간 연장방법에 관한 것으로, 공간을 골고루 활용하여 프레쉬 메모리의 사용기간을 길게 하여 실제적인 사용이 가능하도록 한다.The present invention relates to a method for extending the usage period of a nonvolatile memory chip with a limited number of writes, and to utilize the space evenly to extend the usage period of the fresh memory to enable practical use.

에프램 소프트웨어는 메인 메모리처럼 사용되는 에프램 영역을 계속 사용하다가 사용할 수 없는 시기에 도달하면, 다른 영역을 사용하며, 특히, 에프램 소프트웨어는 제한된 쓰기 횟수를 모두 사용하여 폐기된 영역이 많아지면, 경보를 알려 사용자가 메모리를 교체할 수 있게 한다. 그리고, 에프렘 소프트웨어도 프레쉬 소프트웨어와 마찬가지로 블럭 요구 및 반환처리시 사용이 적은 비휘발성 메모리 영역을 할당함으로써 블럭 이동횟수를 줄일 수 있는 효과가 있다.If the fram software continues to use the fram area used as main memory and reaches an unusable time, the fram software uses another area. In particular, the fram software uses all the limited number of writes and increases the number of discarded areas. Alerts allow users to replace memory. In addition, like the fresh software, Eprem software can reduce the number of block movements by allocating a nonvolatile memory area that is less used for block request and return processing.

Description

비휘발성 메모리 칩의 사용기간 연장방법How to extend the service life of nonvolatile memory chips

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 메모리 구조도,2 is a memory structure diagram of the present invention;

제5도는 본 발명에 따른 사용기간 연장방법에 따른 처리 흐름도.5 is a flowchart illustrating a method for extending a service life according to the present invention.

Claims (2)

기존의 램 영역 및 비휘발성 메모리 영역을 구비하는 에프램과, 폐기된 블럭 갯수 저장 레지스터(410)와, 사용자 지정값 저장 레지스터(420)와, 비교회로 및 인터럽트 발생기(430)를 구비하며 쓰기 제한이 있는 램(RAM) 회로에 적용되어 비휘발성 메모리 칩의 사용기간을 연장하는 방법에 있어서, 자료 구조를 사용자 프로그램이 사용하기 위한 명령이 입력되면 입력되는 명령의 내용을 조사하는 제1단계와, 상기 제1단계 수행 후, 하드웨어 경보인 경우에는 경보 처리를 수행하고 리턴하는 제2단계(500) ; 상기 제1단계 수행 후, 재시동 요구시에는 램 영역을 초기화하고 리턴하는 제3단계(501) ; 상기 제1단계 수행 후, 초기화 요구시에는 비휘발성 메모리 영역을 초기호하고 램 영역을 초기화한 다음 리턴하는 제4단계(503) ; 상기 제1단계 수행 후, 쓰기 요구시에는 칩 쓰기 횟수가 설정된 횟수보다 큰가를 조사하여 크지 않으면 쓰기를행하고 쓴 횟수를 증가시킨 다음리턴하고 큰 경우에는 설정 횟수를 새로운 블럭을 요구하여 이전 블럭을 폐기하고 경보값을 되돌려 상기 쓰기 횟수 조사과정으로 복귀하는 제5단계(504 내지 514) ; 상기제1단계 수행 후, 블럭 요구의 경우에는 사용가능한 블럭의 존재 여부를 표시하고 리턴하는 제6단계(515 내지 518) ; 상기 제1단계 수행 후, 블럭 반환의 경우에는 반환된 블럭을 꼬리쪽에 삽입하고 리턴하는 제7단계(519)를 포함하여 이루어지는 것을 특징으로 하는사용기간 연장 방법.An FRAM having an existing RAM area and a nonvolatile memory area, a block count storage register 410, a user-specified value storage register 420, a comparison circuit and an interrupt generator 430, and a write limit. A method for extending the service life of a nonvolatile memory chip by applying to a RAM circuit, the method comprising: a first step of examining contents of an input command when a command for using a data structure by a user program is input; After performing the first step, in the case of a hardware alarm, a second step of performing and returning an alarm process; A third step (501) of initializing and returning a RAM area upon a restart request after performing the first step; A fourth step (503) of initializing a nonvolatile memory area, initializing a RAM area, and then returning the initialization request after performing the first step; After performing the first step, if the write request is checked whether the number of chip writes is greater than the set number, if it is not large, it writes and increases the number of writes. A fifth step (504 to 514) of returning an alarm value and returning to the writing count investigation process; A sixth step (515 to 518) for indicating and returning the existence of a usable block in the case of a block request after performing the first step; And a seventh step (519) of inserting the returned block into the tail side and returning the block after performing the first step. 제1항에 있어서, 상기 제5단계(504 내지 514)는, 쓰기 요구시에는 칩 쓰기 횟수가 설정된 횟수보다 큰가를 조사하는 제1과정(504), 설정된 횟수보다 쓰기 횟수가 크지 않으면 쓰기를 행하고 쓴 횟수를 증가시킨 다음 리턴하는 제2과정(505,506), 상기 제1과정(504) 수행 후, 설정 횟수를 쓴 횟수가 초과하면 새로운 블럭을 요구하여 새로운 블럭 데이타를 복사하고 프로그램 포인터를 갱신한 다음 이전 블럭을 폐기하는 제3과정(507 내지510), 폐기된 블럭 갯수를 증가시키고 소프트웨어 경부 사용 여부를 조사하는 제4과정(512), 경보를 사용하지 않았으면 상기 제1과정(504)으로 복귀하고 경보를 사용하였으면 폐기된 블럭 갯수와 사용자 지정값이 같은가를 비교하여 비교값이 같으면 경보를 알리는 값을 되돌리고, 비교값이 다르면 상기 제1과정(504) 이하를 수행하는 제5과정(513,514)을 포함하여 이루어지는 것을 특징으로 하는 사용기간 연장 방법.The method of claim 1, wherein the fifth step (504 to 514), in the case of a write request, checks whether the number of chip writes is greater than the set number of times. After the second process (505,506) of increasing the number of times of writing and returning, after the first process (504), if the number of times of writing is exceeded, a new block is requested to copy new block data and the program pointer is updated. A third process (507 to 510) of discarding the previous block, a fourth process (512) of increasing the number of discarded blocks and investigating whether the software is used or not, and returning to the first process (504) if no alarm is used If the alarm is used, the number of discarded blocks is compared with the user-specified value. If the comparison value is the same, the alarm notification value is returned. If the comparison value is different, the fifth process is performed. Extending the service life, comprising steps (513,514). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930019967A 1993-09-27 1993-09-27 Life-extension method of programmable non-volatile memory KR960003401B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930019967A KR960003401B1 (en) 1993-09-27 1993-09-27 Life-extension method of programmable non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930019967A KR960003401B1 (en) 1993-09-27 1993-09-27 Life-extension method of programmable non-volatile memory

Publications (2)

Publication Number Publication Date
KR950009733A true KR950009733A (en) 1995-04-24
KR960003401B1 KR960003401B1 (en) 1996-03-09

Family

ID=19364787

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930019967A KR960003401B1 (en) 1993-09-27 1993-09-27 Life-extension method of programmable non-volatile memory

Country Status (1)

Country Link
KR (1) KR960003401B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100724576B1 (en) 2006-07-24 2007-06-04 삼성전자주식회사 Data transmitting and receiving system

Also Published As

Publication number Publication date
KR960003401B1 (en) 1996-03-09

Similar Documents

Publication Publication Date Title
US5930807A (en) Apparatus and method for fast filtering read and write barrier operations in garbage collection system
CA2511752C (en) Method and apparatus for morphing memory compressed machines
US5940850A (en) System and method for selectively enabling load-on-write of dynamic ROM data to RAM
US7827380B2 (en) Method and apparatus for supporting shared library text replication across a fork system call
KR840001368A (en) Selective Cache Clearing Method and Device in Data Processing System
WO2006120679A2 (en) A method and system for facilitating fast wake-up of a flash memory system
KR840006526A (en) Operating system supervisor method and apparatus for data processing apparatus
US7725620B2 (en) Handling DMA requests in a virtual memory environment
KR970016917A (en) Method and system for updating mass storage configuration records
JP2004054933A (en) Deferment method and device for memory allocation
CN106547636A (en) Debugging system and method
KR940000992A (en) How Digital Data Processors Work
KR950009733A (en) How to extend the service life of nonvolatile memory chips
CN111444117A (en) Method and device for realizing fragmentation of storage space, storage medium and electronic equipment
EP1103898A2 (en) Microprocessor and memory
JP2000148515A (en) Memory scheduling method and storage medium storing memory scheduling program
JPH0158535B2 (en)
US20080072009A1 (en) Apparatus and method for handling interrupt disabled section and page pinning apparatus and method
US7441254B1 (en) Simulation of memory-mapped I/O
CN111274040A (en) Memory management method and device
JP2002149444A (en) Software testing system and software testing method, and computer-readable program recording medium with program for realizing the same method by computer recorded thereon, and program for realizing the same method by computer
CN113515405B (en) Address management method and device
US8614799B2 (en) Memory paging
KR950020156A (en) Processor and Data Processing System Using It
JP2817267B2 (en) Break address detector

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030226

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee