KR950002431B1 - Af high speed serching method of rds receiver - Google Patents

Abstract

The apparatus includes a first low pass filter having high-speed response characteristic corresponding to a short mute time during high-speed searching in PLL, a second low pass filter having low-speed response characteristic, and a switch for selecting the output signal of the first low pass filter or output signal of the second low pass filter according to a microcomputer, thereby converting the low pass filter into low-speed or high-speed using a control signal.

Description

Alternative frequency high speed search method and apparatus of RDS receiver

1 is a block diagram of a typical RDS receiver.

2 is a basic block diagram of a PLL.

3 is an illustration of the change in electric field strength.

A in FIG. 4 is an AF search timing diagram,

b is a mute timing diagram.

5 is a timing diagram of one cycle of a PLL.

6 is a block diagram of an RDS receiver to which an alternative frequency fast search method of the present invention is applied.

7 is an AF search region division diagram according to the present invention.

8 is a search time division diagram according to the present invention.

A in FIG. 9 is an AF data transmission timing diagram,

b is the SD check timing diagram,

c is a muting timing diagram,

d is a control signal timing diagram.

10 is a module diagram of AF search according to ADI.

11 is a signal flow diagram for the fast search method of the present invention.

* Explanation of symbols for main parts of the drawings

11: V's Oh 12: FM Tuner

13: RDS decoder 14: Sync and error correction

15: FM intermediate frequency processing unit 16: microcomputer

17: ELL 18: first low pass filter

19: second low pass filter

The present invention relates to a high-speed tuning technology of an RDS receiver. In particular, in an RDS receiver having a single tuner, an alternative frequency (AF) is searched at a high speed so that an alternative frequency high-speed search of an RDS receiver is suitable for always fetching an optimal AF. A method and apparatus are disclosed.

1 is a block diagram of a general RDS receiver, as shown therein, an FM tuner 1 for selecting an FM broadcast signal of a desired frequency band from an FM broadcast signal of each frequency band (channel) input from an antenna, and the FM tuner ( The RDS signal detector 2 detects the RDS (Radio Data System) signal of the channel tuned in 1) and the synchronization signal from the output signal of the RDS detector 2, and detects and corrects an error. The output electric field strength of the FM intermediate frequency processor 4 and the FM intermediate frequency processor 4 which extracts the intermediate frequency from the high frequency output to the FM tuner 1 Thus, when the SD signal below a predetermined level lasts more than a predetermined time, the microcomputer 5 controls the system to be changed to the currently received broadcast frequency alternative frequency (AF). If it will be described with reference to Figure 5 as follows.

The AF system refers to batch data of a list of different frequencies broadcasting the same program in an RDS broadcasting station, which is a format for realizing auto-tuning, that is, two frequencies in one block of 8 bits x 2 = 16 bits of information. It is composed of up to 25 sequences, and the listener compares the frequency currently being tuned by the receiver to the level of the alternate frequency received on the AF list so that the current receive frequency is automatically switched to the frequency on the AF where the level of the field strength is large. It is a system that allows the user to always listen to clean broadcasts.

In the one-tuner method, the microcomputer 5 scans the electric field strength level of the current reception frequency output to the FM intermediate frequency processor 4, SD (Signal Detect) through an input terminal (ADI: Analog To Digital), as shown in FIG. If this level is compared with the preset reference level and continues below the reference level for a predetermined time (t1), the next AF in the PLL block of FIG. 2 is programmed in the PLL block to perform an alternative frequency AF search operation. If there is an AF list that is larger than the present time, the operation is repeated every time a certain level is maintained by setting to the frequency of the PLL.

However, as shown in FIG. 5, the time for processing one loop of the PLL is the low pass filter response time (t1) + oscillation settling time (t2), and the next data limit sending time for confirming sufficient selectivity is t1 + t2. It is limited after + t3 (rise time of SD).

In addition, due to the time constraints of the SD signal from which the oscillation signal rises from the stable state, the mute duration, which is essentially required as in the fourth diagram, must be considered in consideration of "t1 + t2 + t3 + sun mute + post mute time". Time is generated and there is a limitation in processing the ideal AF combination, and in reality, if the t1 time is shortened, hardware circuit problems such as the signal (S) / noise (N) ratio of the set are greatly exacerbated. It makes no sense.

As the conventional RDS system detects the current SD below a certain level and checks the AF every arbitrary time, the mute time, which is an essential part of this process, is limited by the response time, stability time, and rise time of the peripheral hardware. Due to the defect that the listener is processing long enough to be annoying, the experimental results show that the duration of muting when the surrounding hardware can be followed is about 30MS. Or there was a defect that felt like ambient noise.

In order to solve such a conventional defect, the present invention converts a low pass filter to a low speed and a high speed by using a control signal, and divides the rising relationship time of the intermediate frequency into high speed and low speed, from the time of PLL data transmission to the SD confirmation. Significant savings in time, the invention has been devised to handle other analog characteristics as normal, which will be described in detail with reference to the accompanying drawings.

FIG. 6 is a block diagram of an RDS receiver to which an alternative frequency high-speed search method of the present invention is applied, as shown in FIG. In the FM tuner 12 tuned to the broadcast frequency of the channel according to the oscillation frequency, the RDS decoder 13 for decoding the RDS signal from the output signal of the FM tuner 12, and the output signal of the RDS decoder 13 A synchronization and error correction unit 14 for detecting a synchronization signal and correcting an error, an FM intermediate frequency processor 15 for detecting an FM intermediate frequency from an output signal of the FM tuner 12, and a switch SW11. By controlling the selection of the first, second, low pass filters 18 and 19, the response of the low pass filter is divided into high speed and low speed, and the SD stage of the FM intermediate frequency processor 15 is also stored at high speed and low speed. System to process the currently received broadcast frequency into an alternative frequency (AF) With reference to the second, seventh to eleventh to which the present invention constituted as described above is configured as follows.

First, when receiving an RDS broadcast, it receives the AF according to a predetermined format and stores it in a memory like a normal RDS receiver. At this time, each frequency data of the AF list has already been confirmed that it is the same type of program determined by the transmitter. In the present invention, the level of the electric field intensity is divided into three stages for the purpose of processing with very short mute time when searching another AF automatically. For example, even when 60 dB or more, the AF data is always compared with the current reception level. There is an AF that is larger than the level currently being received, and the data is sent out so that synchronization is performed on the new AF.

In practice, as shown in FIG. 7, the time interval of the AF search in the area A is larger than the area C, and the area C is processed so that the frequency of checking the AF data is greater than that in the areas A and B, while the mute time and the relation The tracking time is shorter in area A than in areas B and C.

Therefore, even if the AF search in the A area is error-processed due to the field situation, if it is processed in the B area and a new AF is set at the A area level, it is tuned to the newly received AF again to the threshold point of the current single point. The AF search function is always maintained regardless of the electric field intensity level, but the mute time of the AF search time interval is changed according to the electric field intensity level so that the listener can almost feel it.

For example, it has been experimentally demonstrated that when the mute time is around 5MS, it is hardly felt that the sound is disconnected until it reaches the listener's ear from the speaker.

Therefore, the settling time of the first low pass filter 18 is set to be smaller than the settling time of the first low pass filter 19, and as shown in FIG. Outputs a high potential to the control terminal faster than the sending time by t2 to cause the switch SW11 to be short-circuited to the first low pass filter 18, and when it is determined to switch to a new AF in the SD judgment, the low range as soon as the next mute time t2. The switch SW11 is shorted to the second low pass filter 19 by reducing to a level.

That is, in order to satisfy the time corresponding to the PLL setting time for the following key in the one looping time of the PLL, a first low pass filter 18 having a fast response characteristic is used. The Ta is controlled as a control terminal in order to shorten the SD rise time which rises after the stable time.

Here, the Ta block significantly reduces the time constant (RC) of the portion that blocks the SD rising speed, such as the AGC (automatic gain control) time of the FM intermediate frequency processor 15, and sets the SD rise within the prescribed SD check time. For the circuit block.

On the other hand, the low pass filter having a high speed characteristic inevitably deteriorates the S / N of the receiver due to the noise less integrated, so that after the SD check is made to improve the S / N, it is immediately transferred to the second low pass filter 19. By switching to the normal low pass filter characteristic integrated sufficiently, the performance of the receiver can be processed normally, which means that the low pass filter can be speeded up, so that the mute duration can be shortened.

As shown in the signal flow diagram of FIG. 10, the AF search is always handled in three areas. For example, as shown in FIG. 11, when it corresponds to the processing routine of the A area, the initial AF start time tw (after AF reception is completed) Unconditionally after the first AF start time), two sets of high-level data on the AF list are unconditionally transmitted to the PLL programmable counter, where tw is a waiting time until the first AF data sending time.

Accordingly, the first and second low pass filters 18 and 19 are driven by the rising or falling of the pulses pumped by the charge pump, and the V is driven by the DC voltages obtained by the first and second low pass filters 18 and 19. In a typical PLL routine in which the CIO 11 is set and input to the O / D again, tuning is completed as it is tuned to an AF list larger than an arbitrary level in the first AF and stopped on 2 AFs.

In this process, the first and second low pass filters 18 and 19 for removing the pop sound are output, and the control output included in the mute time is output to switch ta of the intermediate frequencies. This is achieved.

As described in detail above, the present invention uses a control signal to switch the low pass filter to a low speed and a high speed, and divides the rise time of the intermediate frequency into a high speed and a low speed, thereby greatly reducing the time from the time of PLL data transmission to the SD confirmation. In addition, other analog characteristics can be handled as normal so that the frequency of the PLL can not be audible to the listener.

Claims (4)

A first step of generating a frequency according to an input voltage to decode an RDS signal from an output signal of the FM tuner, and receiving an RDS signal, a second step of detecting an intermediate frequency in the FM tuner, and a signal of the second step In the alternative frequency search method of the RDS receiver comprising a third step of controlling the alternative frequency (AF) in response to the detection to be set to the frequency in the PLEL, the level of the electric field strength detected in the second step by size And a fourth step of dividing, and a fifth step of differently setting the alternative frequency search time intervals according to the levels separated in the fourth step. The method of claim 1, wherein the alternative frequency search time is set longer as the level of the detected electric field strength increases. The method of claim 1, wherein the fifth step sets the mute time of the alternative frequency search time interval to be shorter as the level of the detected electric field strength becomes larger. VIO 11 which decodes the RDS signal from the output signal of the FM tuner 12 and generates a frequency according to the input voltage to receive the RDS signal, and an FM intermediate detecting the intermediate frequency in the FM tuner 12. The RDS receiver comprising a frequency processor 15 and a microcomputer 16 that searches for an alternative frequency AF in response to the signal detected by the FM intermediate frequency processor 15 and controls the PEL 17 to be set at that frequency. A first low pass filter 18 having a high speed response characteristic corresponding to a short mute time during the fast search operation in the PEL 17 and a second low pass filter 19 having a low speed response characteristic And a switch SW11 for selecting the output signal of the first low pass filter 18 or the output signal of the second low pass filter 19 by the microcomputer 16 and outputting the output signal to the VSI 11. Alternative frequency high-speed search cabinet for RDS receivers, including .