KR950001262Y1 - Automatic changing circuit for bnc and d-sub connector of monitor - Google Patents

Abstract

No content.

Description

Automatic switching circuit of BNC and De-sub connector of monitor

1 is a circuit diagram of a BC and D-sub connector switching circuit of a conventional monitor.

2 is a circuit diagram of the BC and D-sub connector automatic switching circuit of the present invention monitor.

3 is a waveform diagram of each part in FIG. 2;

4 is a state diagram according to switching in FIG.

* Explanation of symbols for main parts of the drawings

1A, 1B, 11A, 11B: Video signal input section 2A, 2B, 12A, 12B: Synchronization input section

3,13: video signal input unit 4,14: synchronous output unit

15: switching unit 16: synchronous detection unit

SW ₁ : switch Q ₁ -Q ₇ : transistor

C ₁ -G ₁₉ : Capacitor R _1- R ₂₉ : Resistance

D ₁ -D ₁₅ : Transistor IN ₁ , IN ₂ , IN ₁₁ -IN ₁₆ : Inverter

The present invention relates to the input signal switching of the monitor. In particular, when the BNC and the D-sub are used together, the BNC and the sub connector of the monitor are automatically switched as the synchronization signal is detected. It relates to a switching circuit.

In general, the Binary Numerical Code Connector is mainly used for high-resolution monitors with a horizontal frequency of 64KHz or higher, and the D-sub connector is mainly used for VGA or higher monitors with a horizontal frequency of 56KHz or less.

The first turn, the video signal (R) (G) (B ) are respectively input to transistors, resistors, capacitors and diodes (Q ₁ -Q _3, R, as a prior art of this monitoring bienssi and di-sub connector of the switching circuit shown Books _1- R ₁₂ , C ₁ -C ₆ , D ₁ -D ₃ ) (Q ₄ -Q ₆ , R ₁₃ -R ₂₄ , C ₇ -C ₁₂ , D ₈ -D ₁₀ ) 1B, a synchronization input unit 2A (2B) each composed of diodes (D ₄ -D ₇ ) (D ₁₁ -D ₁₄ ) to clamp horizontal and vertical synchronization (H) (V), and the synchronization input unit (2A) and (2A), the synchronous output unit (4) constituted by an inverter (IN ₁ ) (IN ₂ ) to invert amplify the clamping output, and the video signal input unit (1A) as it is switched to select a BC and a sub connector. A switch SW ₁ for supplying a voltage Vcc to the transistors Q ₁ -Q ₃ and Q ₄ -Q ₆ of (1B), and the video signal input unit 1A according to the switching of the switch SW ₁ . Capacitor (C ₁₃ -C) to remove noise from the output of ₁₈ ) and an image signal output unit 3 composed of resistors R ₂₅ -R ₂₇ , the operation of the conventional circuit will be described as follows.

By connecting the switch SW ₁ to the terminal a in order to allow the user to input the video signal through the BNC connector, a voltage Vcc is applied to the transistors Q ₁ -Q ₃ collector of the video signal input unit 1A. When applied, the turn-on amount of the transistors Q ₁ , Q ₂ , and Q ₃ changes as the image signals R, G, and B are input through the BC connector, so that the image signal is converted into a diode D ₁ ( It is input to the Youngsan signal output unit 3 through D ₂ ) (D ₃ ) and resistors and capacitors (R ₂₅ , C ₁₃ , C ₁₄ ) (R ₂₆ , C ₁₅ , C ₁₆ ) (R ₂₇ , C ₁₇ , C ₁₈ ) the noise is removed and transmitted to the next stage.

Then, the horizontal and vertical synchronous signals H and V are respectively clamped by the diodes D ₄ and D ₅ (D ₆ and D ₇ ) through the BC connector to the synchronous input unit 2A. The inverted and amplified synchronization signal Hs (Vs) is output through the inverter IN ₁ (IN ₂ ).

On the contrary, when the user wants to input the video signal through the D-sub connector and connects the switch SW ₁ to the terminal b, it is connected to the transistors Q ₄ -Q ₆ collector of the video signal input unit 1B. As the voltage Vcc is applied and the image signals R, G, and B are input, the turn-on amounts of the transistors Q ₄ -Q ₆ change to change the diodes D ₈ , D ₉ , and D ₁₀ . The video signal output unit 3 receiving the video signal through the noise and the noise through the capacitor (R ₂₅ , C ₁₃ , C ₁₄ ) (R ₂₆ , C ₁₅ , C ₁₆ ) (R ₂₇ , C ₁₇ , C ₁₈ ) After removing, the signal is transmitted to the next stage, and the horizontal and vertical synchronization signal H (V) input to the synchronization input 2B is clamped through the diodes D ₁₁ and D ₁₂ (D ₁₃ and D ₁₄ ). The inverted-amplified synchronization signal Hs (Vs) is output from the inverter IN ₁ (IN ₂ ) of the output unit 4.

However, such a conventional circuit has an inconvenience in that a switch must always be switched to a place where a signal is input when a video signal is inputted through a BNC connector or a D-sub connector.

In order to solve the conventional inconvenience, the present invention detects the synchronization status according to the detection of the horizontal synchronization signal, where the video signal and the synchronization signal of the BNC connector and the D-sub connector of the monitor are input. As a result of the non-nsi and de-sub automatic switching circuit for automatically switching the terminals of the analog switch as described with reference to the accompanying drawings as follows.

2 is a BNC and desub automatic switching circuit diagram of the monitor of the present invention, as shown in FIG. And a diode and an inverter (D ₇ -D ₇ , IN ₁₃ , IN ₁₄ ) (D ₁₁ -D ₁₄ , IN ₁₅ , IN ₁₆ ), respectively, to invert the amplification by clamping the synchronization signal (H) (V). The transistor Q ₇ and the diode D are connected to the synchronization input units 12A and 12B and the inverter IN ₁₃ of the synchronization input unit 12A to output the synchronization detection signal V ₁ as the synchronization signal is detected. ₅ ), the terminal Z _a -Z _c according to the synchronous sensing unit 15 composed of the capacitor C ₁₉ and the resistors R ₂₈ and R ₂₉ and the output V ₁ of the synchronous sensing unit 15. Comprising a switching unit 15 for switching the connection point, the switching unit 15 is a 4035B chip which is an analog switch.

The effect of the BNC and the desub automatic switching circuit of the present invention monitor configured as described above will be described in detail with reference to the waveform diagram of FIG. 3 and the state diagram according to FIG. 4 switching.

First, the video signal (R) (G) (B) and horizontal with a BNC connector. When the vertical synchronization signal H (V) is input, the synchronization input unit 12A is horizontal. The vertical synchronization signal (H) (V) is clamped through the diodes (D ₄ , D ₅ ) (D ₆ , D ₇ ) and then inverted amplified by the inverters IN ₁₃ (IN ₁₄ ), respectively. As shown in FIG. 2, the synchronous detection unit 16 receiving the inverted horizontal synchronization signal H is rectified in the diode D ₁₆ and smoothed to the capacitor C ₁₉ as shown in FIG. As the Q ₇ is turned on, the synchronous detection signal V ₁ is smooth as shown in FIG. 3 (b), and the transistor Q ₇ is turned on as the synchronous detection signal V ₁ is turned on as shown in FIG. As shown in Fig. 2), the terminals S _a -Z _c of the switching unit 15 are connected to the terminals Y _0a -Z _{0c at} low potential (0,2V), respectively, so that the transistors of the image signal input unit 11A Q ₁ -Q ₃ ) The voltage Vcc as shown in FIG. 3 (d) is connected to the collector, and the synchronous input unit 12A is connected to the synchronous output unit 14.

Accordingly, the image signal input unit 11A receiving the image signals R, G, and B through the BC connector changes the turn-on amount of the transistors Q ₁ , Q ₂ , and Q ₃ . (D ₁ ) (D ₂ ) (D ₃ ) is inputted to the image signal output unit 13 so that the resistors and capacitors R ₂₅ , C ₁₃ , C ₁₄ (R ₂₆ , C ₁₅ , C ₁₆ ) (R ₂₇ After the noise is removed through C ₁₇ and C ₁₈ , it is transmitted to the next stage, and the output F of the synchronous input unit 12A (V) is connected to the inverter IN ₁₁ (IN ₁₂ ) of the synchronous output unit 14. It is inverted and amplified by the output signal as a synchronization signal Hs (Vs).

Conversely, the video signals R (G) (B) and horizontal with a D-sub connector. When the vertical synchronizing signal H (V) is input, the synchronizing detection unit 16 which does not detect the horizontal synchronizing signal H at the synchronizing input unit 12A causes the transistor Q ₇ to turn off and then to FIG. As shown in the drawing, the high potential synchronous detection signal V ₁ is output to the selection terminals Sa _a -Z _c of the switching unit 15.

At this time, the low potential is input to the enable terminal E, and the switching unit 15 in which the high potential is input to the selection terminals S _a -S _c connects the terminals Z _a -Z _c to the terminals Y _1a. -Y _1c ), respectively, to the transistors Q ₄ -Q ₆ of the image signal input unit 11B to connect the voltage Vcc as shown in FIG. 3 (j) and to the input unit 12B. Is connected to the synchronous output unit 14.

Accordingly, as the image signals R, G, and B are input through the sub-connector, the image signal input unit 11B changes the turn-on amount of the transistors Q ₄ , Q ₅ , and Q ₆ so that the image signal is changed. The image signal output unit 13 input through the diodes Q ₈ , Q ₉ , and Q ₁₀ includes resistors and capacitors R ₂₅ , C ₁₃ , C ₁₄ (R ₂₆ , C ₁₅ , C ₁₆ ) (R ₂₇ , C ₁₇ , C ₁₈ ) after removing the noise and transmitting to the next stage and receiving the horizontal and vertical synchronization signal (H) (V), the synchronization input unit 12B is a diode (D ₁₁ , D ₁₂ ) (D ₁₃ , D ₁₄₎ after the inverter (iN ₁₅₎ (iN and then through _16), the inverting amplifier synchronization output unit 14, an inverter (iN ₁₁₎ (synchronization signal re-inverting amplifier via the iN ₁₂₎ (Hs of the clamping in) Will output (Vs).

That is, the switching section 15 is switched to the terminal (S _a -Z _c) connected in accordance with the output of the synchronous detector 16, which as shown in the fourth-degree connection state diagram.

As described in detail above, the BNC and the sub automatic switching circuit of the present invention monitor automatically switches the terminal connection according to the detection of the synchronization by detecting the horizontal synchronization signal, so it is not necessary to switch manually each time the connector is connected. This has the effect of satisfying the user.

Claims (2)

Noise is removed from the outputs of the video signal input units 11A and 11B and the video signal input units 11A and 11B that amplify after removing the noise as the video signals R, G, and B input. The video signal output section 13 to be transmitted to the stage, the synchronous input sections 12A and 12B for clamping and inverting the synchronous signals H and V, and the outputs H of the synchronous input sections 12A and 12B. A synchronous output unit 14 for inverting and amplifying (V), a synchronous detection unit 16 for outputting a synchronous detection signal V ₁ as the output H of the synchronous output unit 14 is detected, and The image signal input unit 11A, 11B is switched to the image signal output unit 13 according to the output V ₁ of the synchronization detector 16, and the synchronization input unit 12A, 12B is connected to the synchronous output unit ( The BNC and the desub automatic switching circuit of the monitor, characterized in that it comprises a switching unit 15 for switching to (14). According to claim 1, the synchronization detector 16 is configured by a transistor (Q ₇ ) to turn on, turn off in response to the inverse synchronization signal (H) of the synchronization input unit 12A to output the synchronization detection signal (V ₁ ). BC and Desub automatic switching circuit of the monitor, characterized in that.