KR940008859B1 - Key-input apparatus for computer system and processing method thereof - Google Patents

Abstract

The apparatus provides key input processing which can recognize multiple keys input data using a single input port. The apparatus comprises: a key data generating part (1) containing multiple key switches, an AD converter (21) converting analog signal supplied to the single input port (IP) to digital signal, an input register (22) storing the AD converter output, an output register (23) supplying grid signals (G-4G) to a key data generation part, a clock generator (24) supplying driving clock to an AD converter, an input register and an output register.

Description

Key input processing device and method of computer system

1 is a circuit diagram of a key input processing system according to the present invention.

2 is a part timing chart related to FIG.

3 is an example of a key input processing program installed in the system.

4 is a diagram illustrating an input data key recognition pattern.

* Explanation of symbols for main parts of the drawings

1, 3: key data generator 21, 41A-41D: AD converter

22, 42A-42D: Input Register 23, 43: Output Register

24: clock generator 25, 45: data bus

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to key input processing means such as a computer system, and more particularly, to a key input processing apparatus and a method for recognizing input information of multiple keys using only one input port terminal such as a system microcomputer. .

Conventionally, such a key input processing means is utilized by being provided with a key input device connected to a plurality of input ports of the system micom, and the method is a kisscan method.

However, in such a prior art, the architecture design of the system micom is not easily achieved by using multiple input ports of the system micom, and the functional limitation of the system micom is inevitably caused by the constraints of the input and output usage designs. Was.

An object of the present invention is to provide a key input processing apparatus which enables key input information to be recognized using a single port (pin) of the system micom.

In particular, the present invention temporarily stores a key data generation unit for generating a differential voltage by a plurality of key matrix equalization resistors, an AD converter for converting an analog voltage generated by the key data generation unit into digital, and a digital output of the AD converter unit. And a key input processing device having a related configuration with an input register provided to a system bus and an output register for providing a driving grid signal to the key data generating unit, and a key input processing method thereof. will be.

Hereinafter, this will be described in more detail.

That is, FIG. 1 shows a key input processing apparatus according to the present invention.

Here, a number of key matrix resistors (R ₁₀ -R ₁₄ , R ₂₀ -R ₂₄ , R ₃₀ -R ₃₄ , R ₄₀ -R ₄₄ ) and matrix keys (SW ₁₀ -SW ₁₄ , SW ₂₀ -SW ₂₄ , SW _30- A key data generator 1 including SW ₃₄ , SW ₄₀ -SW ₄₄ , a single line key input signal provided by the key data generator 1, followed by a key single input port IP and an AD converter 21; ), A transistor (Q _{1 to} Q ₄ ) and an output register (23) for driving the input register (22) and the key data generator (1), and a driving clock to the input and output registers (22, 23). Providing a clock generator 24 and a diode D ₁ -D ₄ to prevent it from returning to the single input port of the microcomputer 4 when a key input signal is applied to the single input port IP of the microcomputer _4. The circuit includes a circuit.

Meanwhile, FIG. 3 shows a key data recognition program (KIP) mounted in the system micom in relation to FIG.

In this case, it is checked whether 1G is turned on from the start step (step 51). If Y (Yes), the data value of the input register 22 is read (step 58). If N (NO), 2G is checked (step 52). ). If Y, the input register 22 is read (step 68), and if N, 3G is turned on (step 53).

In step 53, if N is also checked whether 4G is on (step 54), if N is set, n counters are set (step 55), if the number of counts is checked n (step 56), if Y, n counters are reset. After completion (step 57), the process goes to step 51 if it is w in step 56.

If Y in steps 53 and 54, the value of input register 42 is read (steps 72 and 76), and after steps 58, 68, 72 and 76, it is checked whether an input exists (steps 59, 69, 73 and 77). N, go to step 52, 53, 54, 55, and Y read key recognition pattern A pattern data-D pattern data (step 60, 70, 74, 78), A, B, C, D data After a comparison decision is made (steps 67, 71, 75, and 79), a series of processing steps are performed for processing the recognized key.

The present invention of such a configuration is as follows.

That is, in the system microcomputer 2 of the present invention, when the grid data is provided to the output register 23 as shown in FIG. 1, the equalization resistances R ₁₀ -R ₁₄ and R ₂₀ -R are provided in the key data generator 1. ₂₄ , R ₃₀ -R ₃₄ and R ₄₀ -R ₄₄ are provided with a grid signal by the output register 23.

At this time, when the grid signal of G ₁ -G ₄ is provided by the output register 23 as shown in FIG. 2 and the pulse width at this time is t ₁ , this is set to the pulse width at which the key return check can be performed.

Therefore, when none of the switches SW _10- SW ₄₄ are turned on in the state where the G ₁ -G ₄ output is provided to the key data generator 1, the diodes D ₁ -D ₄ are turned off. Through the analog converter according to the resistance value is provided to the AD converter 21. The analog level at this time is And so on. In addition, when the switch SW ₁ is turned on by t ₃ as shown in FIG. 3, only the transistor Q ₁ circuit of the transistors Q ₁ -Q ₄ is turned on, and the return level on the 1G side is increased. It becomes

This is the same as the A waveform corresponding to the ON period t ₃ of the third degree switch SW ₁₁ , so this return signal is applied to the system CPU side through a single key input port, which is connected to the system via the AD converter 21 and the input register 22. It is input to the bus 25.

In this state, the system micom 2 checks the 1G-4G grid state with the key data recognition program (KIP) of FIG. 3, reads the input value, reads the input, and divides it into the key recognition pattern AD pattern data (step 51). -54, steps 58, 68, 72, 76, 59, 69, 73, 77, 60, 70, 74, 78).

On the other hand, Figure 4 shows a key recognition pattern according to the input data of the present invention.

In the present invention, the key matrix is configured with a resistance circuit, and generates a key data output unit. The system micom can recognize key input data with a single input port. There are beneficial features that can be facilitated.

Claims (2)

A key data generator (1) including a plurality of key switches together with an equal resistance, one input port (IP) for receiving a voltage amount provided from the key data generator to one output line, and one of An AD converter 21 for converting the analog signal provided to the input port IP into digital, an input register 22 for temporarily storing the output of the AD converter 21, and a grid signal The output register 23, the AD converter 21, and the clock generator 24 providing the drive clock to the input register 22 and the output register 23 are provided on the system microcomputer 2 side. Key input processing apparatus of a computer system characterized in that the configuration. A combination of multiple matrix resistors and matrix keys generates a single key data output, which is input to a single port from the system micom and reads the value of the input register according to the state of each grid signal (1G-4G), According to the present invention, a key data recognition program (KIP) having a series of processes for reading key recognition pattern data and determining this as a comparative determination mode to obtain key recognition information is provided to recognize the key recognition data with a single input port. Key input processing method, such as a computer system.