KR940008215A - Sinusoidal wave generation circuit - Google Patents

Sinusoidal wave generation circuit Download PDF

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Publication number
KR940008215A
KR940008215A KR1019920017926A KR920017926A KR940008215A KR 940008215 A KR940008215 A KR 940008215A KR 1019920017926 A KR1019920017926 A KR 1019920017926A KR 920017926 A KR920017926 A KR 920017926A KR 940008215 A KR940008215 A KR 940008215A
Authority
KR
South Korea
Prior art keywords
input
nhz
wave
generation circuit
control
Prior art date
Application number
KR1019920017926A
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Korean (ko)
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KR950009125B1 (en
Inventor
김득수
Original Assignee
김득수
주식회사 파워트론
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김득수, 주식회사 파워트론 filed Critical 김득수
Priority to KR1019920017926A priority Critical patent/KR950009125B1/en
Publication of KR940008215A publication Critical patent/KR940008215A/en
Application granted granted Critical
Publication of KR950009125B1 publication Critical patent/KR950009125B1/en

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

본 발명은 직류전원을 교류로 변환하는 인버터(역변환기)의 제어회로에 있어서 4개의 제어입력을 갖는 8채널 멀티플렉서의 입력측에 계단식 정현파레벨 전압발생회로를, 출력측에 능동필터를 연결하고 제어입력측에는 리셋트 펄스, 16×NHz의 클락펄스 및 업다운 신호인 NHz의 구형파가 입력되는 BCD 업다운카운터로 회로를 구성하여 비반전 입력 Vc로 조정함에 있어서 신호파인 정현파의 진폭의 크기를 용이하게 조정할 수 있는 것이다.The present invention provides a stepped sinusoidal level voltage generation circuit at the input side of an eight-channel multiplexer having four control inputs in a control circuit of an inverter (inverter converter) for converting a DC power source into an alternating current, an active filter connected to the output side, and a control input side It is easy to adjust the amplitude of the sine wave, which is a signal wave, by adjusting the non-inverting input Vc by constructing a circuit with a BCD up-down counter to which a reset pulse, a clock pulse of 16 x NHz, and a square wave of NHz, which is an up-down signal, are input. .

Description

정현파 발생회로Sinusoidal wave generation circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 블록 다이어그램.2 is a block diagram of the present invention.

제3도는 본 발명의 회로도.3 is a circuit diagram of the present invention.

제5도는 계단식 정현파 레벨전압 발생회로.5 is a stepped sinusoidal level voltage generation circuit.

Claims (1)

4개의 제어입력(I, C, B, A)를 갖는 8채널 멀티플렉서(U2)의 입력측에 계단식 정현파레벨 전압발생회로(4)의 출력을 인가하고 출력단은 제어입력(Q4)를 받아 제어되는 아날로그 스위치(U3)의 출력과 공통으로 공지의 능동필터(5)에 연결하며 제어입력측에는 리셋트 펄스, 클락펄스(16×NHz) 및 업다운(up-down) 신호인 NHz의 구형파가 입력되는 BCD 업다운 카운터(U1)를 연결함으로써 계단식 정현파 레벨발생회로(4)의 비반전입력Vc를 조정함에 의하여 정현파의 진폭을 조정함을 특징으로 하는 정현파 발생회로.The output of the stepped sinusoidal level voltage generating circuit 4 is applied to the input side of the eight-channel multiplexer U2 having four control inputs I, C, B, and A, and the output terminal is controlled by receiving the control input Q4. BCD up-down, which is connected to a known active filter 5 in common with the output of the switch U3, and a reset pulse, a clock pulse (16 × NHz), and a square wave of NHz, which is an up-down signal, are input to the control input side. A sinusoidal wave generating circuit characterized by adjusting the amplitude of a sine wave by adjusting the non-inverting input Vc of the stepped sinusoidal level generating circuit (4) by connecting a counter (U1). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920017926A 1992-09-30 1992-09-30 Symmetric wave developing circuit with variable width KR950009125B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920017926A KR950009125B1 (en) 1992-09-30 1992-09-30 Symmetric wave developing circuit with variable width

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920017926A KR950009125B1 (en) 1992-09-30 1992-09-30 Symmetric wave developing circuit with variable width

Publications (2)

Publication Number Publication Date
KR940008215A true KR940008215A (en) 1994-04-29
KR950009125B1 KR950009125B1 (en) 1995-08-14

Family

ID=19340394

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920017926A KR950009125B1 (en) 1992-09-30 1992-09-30 Symmetric wave developing circuit with variable width

Country Status (1)

Country Link
KR (1) KR950009125B1 (en)

Also Published As

Publication number Publication date
KR950009125B1 (en) 1995-08-14

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