KR940007164Y1 - Mode conversion display circuit of monitor - Google Patents

Abstract

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Description

Mode switching display circuit of the monitor

1 is a block diagram of a mode conversion detection circuit of a conventional monitor.

2 is a circuit diagram showing an embodiment of a mode conversion display circuit of a monitor according to the present invention.

3 is a logic diagram of the FIG. 2 decoder.

4 is a mode-by-mode state diagram of a standard VGA.

5 is a truth table of the FIG. 2 decoder.

* Explanation of symbols on the main part of the drawing

10: mode discrimination unit 20: horizontal and vertical deflection circuit

30: decoder 40: mode status display unit

R1 to Rl0: Resistor LED1 to LED10: Diode

BUF1 to BUF4: Buffer AND0 to AND9: And Gate

The present invention relates to a monitor in which a video card is used, and more specifically, a mode in which a video card of a video graphic adapter (Video Graphic Addptor: hereinafter referred to as "VGA") is used. The present invention relates to a mode conversion display circuit of a monitor having a light emitting device that can display the user so that a user can sense a mode change.

In general, among monitors that use video card of VGA level or higher that requires image processing using multi-mode detection circuit according to the change of signal source (e.g., personal computer), the screen state displayed on the screen is changed even if the mode is changed. It was difficult for the user to detect this mode change because the screen state difference was only the resolution or frequency difference.

That is, FIG. 1 shows a mode conversion detection circuit of a conventional monitor, and shows the sawtooth current according to the mode discrimination result of the mode discrimination unit 10 and the mode discrimination unit 10 including a plurality of exclusive oragates. And horizontal and vertical deflection circuits 20 generated and supplied to the horizontal and vertical deflection coils HLl. VLl, and the mode discrimination unit 10 has an internal circuit composed of an exclusive oragate. The applied horizontal and vertical synchronization signals (H-Sync). (V-Sync) are exclusively classified to determine the mode according to the video card currently being used.

In the above mode, the mode is determined according to the resolution of each video card in the VGA or SVGA (Super VGA) or multi-sync monitor card in the currently used video card. Mode 1 with 720 × 350, mode 2 with 720 × 400 resolution, and mode 3 with 640 × 480 resolution, and there are five modes in the case of SVGA. Differentiation of horizontal and vertical synchronization signals applied to each mode is different. Therefore, if the exclusive or exclusive output is different, the exclusive ora output is different for each mode, so each mode can be distinguished, and each mode is determined. To be.

The horizontal and vertical synchronization signals (H-Sync) of which the mode is determined by the mode determination unit 10 are applied to the horizontal and vertical deflection circuits 20 to synchronize the oscillation waveforms of the oscillation waveforms of the horizontal and vertical oscillators. The oscillation waveform is output through the horizontal and vertical oscillation amplifiers and is applied to the horizontal and vertical deflection coils (HLl) and (VLl) of the cathode ray tube (CRT) to be emitted from the electron gun of the cathode ray tube (CRT). The angle is adjusted to scan the cathode ray tube (CRT) surface.

On the other hand, although not shown, generally between the mode discrimination unit 10 and the horizontal and vertical deflection circuit 20 is provided with a vertical size adjustment circuit for adjusting the vertical size of the screen in accordance with each mode.

In the mode detection circuit of the conventional monitor as described above, each mode is discriminated by exclusively outputting horizontal and vertical synchronization signals inputted from the mode discrimination unit and outputted horizontally and vertically to the horizontal and vertical deflection circuits according to the mode discrimination result. There is no function to indicate this even if the mode is changed only because the vertical deflection is performed, so the user cannot sense the difference of the mode because the screen state alone is not felt.

This invention is designed to solve this problem. The purpose of this invention is to provide a light emitting device on the outside of the monitor that can display the mode change in a monitor that uses a video card of VGA level or higher. The purpose is to provide a mode conversion display circuit of a monitor.

A feature of this design to achieve this purpose is to consist of a number of exclusive oragates, including a mode discrimination unit for discriminating each mode by exclusively inputting horizontal and vertical synchronous signals and changing modes of the monitor. A mode conversion detecting circuit of a monitor for detecting a signal, comprising: a decoder connected to the mode discriminating unit to decode a mode discriminating output of a mode discriminating unit, and a mode connected to the decoder to emit light according to a decoding output of the decoder to display a current mode. The mode conversion display circuit of a monitor provided as a status display part.

Below. One preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram showing an embodiment of a mode conversion display circuit of a monitor according to the present invention, wherein a horizontal and vertical synchronous signal (H-Sync) composed of a plurality of exclusive oar gates is input. ) By generating the sawtooth wave current according to the mode discrimination result of the mode discrimination unit 10 to the mode discrimination unit l0 which determines each mode by means of the exclusive ora, horizontal and vertical deflection coils HLl and VLl. The horizontal and vertical deflection circuits 20 to be connected to each other are connected, and the mode discrimination unit 10 and the soup and vertical deflection circuits 20 have a general configuration.

The mode discrimination unit 10 is connected to a decoder 30 for decoding the mode discrimination output of the mode discrimination unit 10, and the decoder 30 emits light according to the decoding output of the decoder 30 to determine the current mode. The mode state display unit 40 to be displayed is connected.

3 is a logic diagram showing the decoder 30 in detail. The decoder 30 uses a 74LS42 chip, which is a TTL (Transistor Transistor Logic) chip. A plurality of AND gates AND0 to AND9 for logically combining the BUFl) to BUF4 outputs to decode the input signal are connected. Pin 8 of the decoder 30 is a ground pin. The number pin is the pin to which the power (Vcc) is applied.

The display unit 40 has a cathode side connected to the AND gates AND0 to AND9 of the decoder 30, and an anode side connected to the voltage source Vcc through the resistors R1 to R10. It consists of a plurality of light emitting diodes LEDl to LEDl0 which emit light in accordance with the outputs of the AND gates AND0 to AND9.

In the present invention configured as described above, when a monitor using a VGA card is described as an example, the horizontal and vertical synchronization signals (H-Sync) and (V-Sync) input to the mode determining unit 10 are the mode determining unit 10. Each mode is discriminated and outputted by the exclusive oragate inside, and the mode discrimination output is the horizontal and vertical synchronous signal part in the fourth mode indicating the state of the standard VGA card. Since the polarity of the horizontal and vertical synchronization signals for Mode 1 with resolution 720 × 350, Mode 2 with resolution 720 × 400, and Mode 3 with resolution 640 × 480 are output differently depending on the mode, the mode can be distinguished. The output of the mode discriminating unit 10 is applied to the horizontal and vertical deflection circuit 20 to apply the sawtooth wave to the horizontal and vertical deflection coils HLl and VLl according to each mode. same.

On the other hand, the output of the mode discrimination unit 10 is also applied to the decoder 30 and decoded to drive the light emitting diodes (LEDl) to (LEDl0) to display the mode state, the decoder 30 is generally used Using a 74LS42 TTL chip, this decoding output is as shown in the truth table of FIG. 5, where H represents a logic high state and L represents a logic low state. In this design, the light emitting diodes (LED1) to (LEDl0). Since the cathode side of the circuit is connected to the output side of the decoder 30, only the logic low value is taken from the truth table to be driven.

Therefore, if you want to output and display only three modes of Mode 1, Mode 2, and Mode 3 of the standard VGA, only two terminals A0 and A1 of the input terminals of the decoder 30 need to be taken. Therefore, A0 and A1 of the logic low outputs of the truth table of FIG. The outputs of pins ②, pin ③, and pin ⑤, that is, the outputs of the end gates ANDl and AND2 and AND4, are output in the low state corresponding to the input values of the two input terminals of the input terminals. Since only the light emitting diodes connected to (AND2) and (AND4) emit light, the user can know that the current mode is Mode 1 or Mode 2.Mode 3 of VGA.

The reason why only two input terminals of A0 and A1 may be used to display the mode 1, the mode 2, and the mode 3 may indicate four cases of 00,01,10,11 as two input terminals A0 and A1. Therefore, mode 1 corresponds to 10 (H, L), mode 2 corresponds to 01 (L, H), and mode 3 corresponds to 00 (L, L), as shown in FIG. Three modes can be displayed as input terminals.

That is, the set designer is a decoder in which the input of the light emitting diodes (LEDl) to (LEDl0) is controlled according to the horizontal and vertical synchronization signals (H-Sync), (V-Sync) input to the mode panel 10. As shown in the truth table of FIG. 5, the light emitting diodes must be connected to correspond to the output of the decoder 30 so as to display the desired mode by changing according to the input terminal of (30). If you want to apply this in a monitor such as multi-sync, since there are five modes in the SVGA, only three input stages of A0, Al, and A2 are used in the decoder 30, and in the case of a multi-sync monitor, A0, A1. All four input terminals A2 and A3 may be used, and only the connection relationship between the decoder 30 and the light emitting diode may be appropriately selected.

As described above, the present invention provides a mode in which a light emitting diode is provided on the outside of the set in order to overcome the fact that the display device can not clearly distinguish the change even if the mode of the input signal changes. The effect is that the user can visually sense the change, thereby making it possible to control the signal source in the opposite direction that the user desires more conveniently and usefully.

Claims (2)

Comprised of a plurality of exclusive oragate has a mode discrimination unit 10 for discriminating each mode by the horizontal or vertical synchronization signal (H-Sync), (V-Sync) input by A mode change detection circuit of a monitor for detecting a mode change of a monitor, comprising: a decoder (30) connected to the mode determiner (10) for decoding the mode discrimination output of the mode determiner (10), and the decoder (30). And a mode state display unit 40 connected to the light emitting device according to the decoding output of the decoder 30 to display the current mode. The decoder of claim 1, wherein the mode state display unit 40 has a cathode side connected to the decoder 30 and an anode side connected to resistors Rl to R10 connected to a voltage source Vcc. A mode switching display circuit of a monitor comprising a plurality of light emitting diodes (LEDl) to (LEDl0) that emit light in accordance with the decoding output of 30).