KR940006009B1 - Data storing device in automatic answering telephone - Google Patents

Abstract

a microprocessor for recording data in a cassette tape and storing the recorded data in an internal memory; a tone generator for generating a tone signal; an analog switch for controlling the tone signal; an amplifier for amplifying the tone signal; an acoustic amplifier for supplying the tone signal received from the amplifier to a reproducing and recording head or supplying data reproduced from the reproducing and recording head to the microprocessor; and a select switch for selecting a data input/output path between the acoustic amplifier and the reproducing and recording head. The device prevents data from losing during power failure.

Description

Data storage on answering machine

1 is a block diagram of a data storage device of the answering machine of the present invention.

2 is an exemplary circuit diagram of an apparatus of the present invention.

Figure 3 (a) is a flowchart of a data recording process by the apparatus of the present invention.

3 (b) is a flowchart of a data backup process by the apparatus of the present invention.

4 is a circuit diagram of a data backup device of a conventional microprocessor.

* Explanation of symbols for main parts of the drawings

1: microprocessor 2: bone generator

3: acoustic amplifier 4: erasing head

5: playback and recording head A: amplifier

SW1, S2: Analog Switch SW3: Selection Switch

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data storage device for an answering machine, and more particularly, to a data storage device for an answering machine so that important data input to the answering machine is not lost in the event of a power failure by using a magnetic tape as necessary information or data recording medium. It is about.

Conventionally, as shown in FIG. 4, the expansion memory 32 is connected to the microprocessor 31 by the address bus 33 and the data bus 34, and the storage memory 35 is connected to the expansion memory 32. Connected as (D1) and used as an emergency power supply.

In addition, the microprocessor 31 converts the commercial power supply AC into the required DC power supply B + through the adapter 37, and then supplies the power supply B + as the voltage regulator 36 and also supplies the expansion memory 32 with power. When the AC power supply (AC) is cut off, the power supply of the storage battery 35 is supplied to the expansion memory 32 through the diode D1 to store the data stored in the expansion memory 32. Loss is prevented and at the same time, when AC power is applied, the power supply of the battery 35 is cut off by the diode D1 and the power B + is supplied. When the power supply time by the capacity of the storage battery 35 is longer, the data stored in the expansion memory 32 is lost. Therefore, the storage battery 35 and the expansion memory 32 only store data of the microprocessor 31. Used only for storage, This is difficult, is a need for expansion memory and a battery mounting area products such as auto-changer that is developed in a trend of a particular frivolous chancel had the disadvantages that are difficult to install.

The present invention connects an acoustic amplifier, tone generator and control switch to a microprocessor, and connects the head of a cassette tape recorder to the acoustic amplifier through a control switch in order to solve the above disadvantages. The tape recorder records and plays back the tape, but the microprocessor stores the data recording and playback (backup) instruction programs during and during the cassette tape recorder to prevent loss of input signals and data until a power failure. It is an object of the present invention to provide a data storage device of an answering machine that can be reduced in size and light weight. The present invention will be described in detail below with reference to the accompanying drawings.

Referring to FIG. 1, a microprocessor 1 for controlling data of a cassette deck motor M through a motor driving unit to record data on a cassette tape, and to read data recorded on the tape and back it up to internal memory; A tone generator 2 that generates a tone signal under the control of the microprocessor 1, and a first analog output control of the tone signal of the tone generator 2 under the control of the microprocessor 1; A switch SW1, an amplifier A that amplifies the tone signal passing through the first analog switch SW1 and supplies it to the acoustic amplifier 3, and a tone signal input from the amplifier A; Acoustic amplifier (3) for supplying to the reproduction and recording head (5) through SW3) or the data reproduced from the reproduction and recording head (5) through the selection switch (SW3) and to the microprocessor (1); , The micro A selection switch SW3 for selecting a data input / output path between the acoustic amplifier 3 and the playback and recording head 5 under the control of the processor 1, the input terminal of the amplifier A and the acoustic amplifier ( 3) and a second analog switch (SW2) for controlling the signal path between the input and output terminals of the microprocessor (1) under the control of the microprocessor (1) and the erase signal output from the acoustic amplifier (3) Erasing head (4) for erasing the tape, and a speaker (SP) for receiving and outputting the audio signal amplified by the acoustic amplifier (3), L1 is a trunk line, HS is a hook switch, B + is a power source to be.

As shown in FIG. 2, the selection switch SW3 is a transistor Q1 turned on and off by a control signal input to the microprocessor 1, and the transistor Q1 is turned on and off. Is switched on and off by an analog switch 101 for supplying or cutting off data input from the reproduction and recording head 5 to the acoustic amplifier 3 and a control signal input from the microprocessor 1 An analog switch 102 for supplying or interrupting data input from the reproduction and recording head 5 to the acoustic amplifier 3 via the analog switch 101, and a control signal input from the microprocessor 1; It consists of an analog switch 102, which is turned on and off by and supplies or cuts off data supplied from the acoustic amplifier 3 to the reproduction and recording head 5.

Under the control of the microprocessor 1, the acoustic amplifier 3 amplifies the signal input to the input terminal A0 and outputs it to the output terminal A5, and the signal input to the input terminal A1 is amplified. Outputs to the output terminal A3, and outputs the audio signal inputted to each input terminal to the output terminal A4 under the control of the microprocessor 1, to the speaker SP, and to the microprocessor during recording. Under the control of (1), the output signal A2 outputs an erase signal and supplies the erase signal to the erase head 4, whereby A6 is used as the power supply terminal.

The microprocessor 1 further includes a memory therein, four registers R1-R4 and registers A for controlling, a timer, and a flop F0. As shown in Fig. 3 (b), the control process is performed.

That is, the microprocessor 1 is [recording time]; Registers R3 and R4 (A) and timers are used, and registers R3 are used as data registers to store data to be written to tape, and registers R4 are used to retrieve data processing of 8 bits = 1 byte. The register A is used as a register for searching the high ("1") and the low ("0") by receiving the data stored in the register R3 by one bit.

That is, as shown in FIG. 3 (a), the first step of inputting data stored in the register R3 and setting it to the number 8 in the register R4, and left rotating with the carry to the register R3. Memorizing A and checking whether Carry has occurred and recording a single tone for 20m seconds if Carry has occurred, recording a single tone for 40msec if Carry has not occurred, and then recording 20msec. While recording the silence and then reducing the value of register R4 to check if the value of register R4 is zero, and returning to the second step if the value of register R4 is not "0" In step 4, the value of the register r4 is " 0 "

Therefore, the execution result of the above process indicates that if any one bit value of 1 byte = 8 bit data is "1", the format of the signal recorded on the cassette tape is recorded in the format of "single tone for 20m seconds + + 20m second". If the bit value is "0", it is recorded in the format of "Single tone for 40m seconds + silent for 20m seconds".

[Playback]: Registers R1-R3, Flags F0, and timers are used. Registers R1 and R2 are used as registers for storing one-byte data, and registers R3 retrieve timer times. The flag F0 is used as a flag for searching for high and low (present or absent) of data reproduced from the tape and input to the microprocessor 1.

That is, as shown in FIG. 3 (b), after the first step of setting the values of the registers R1 and R2 to 0, the timer F5 is cleared to zero after starting the 5 m second timer, After the second step of setting the value of the register R3 to 0 and checking whether the 5 m second time is completed, start the 5 m second timer, increase the value of the register R3, and then A third step of checking whether the value is greater than 12, and returning to the second step if the value of the register R3 is not greater than 12, stopping the timer if it is larger than 12, displaying an error, and then returning to the first step. A fourth step of checking whether the terminal P2 is " low " if the 5 m second time has not elapsed in the third step; and if the terminal P2 is low, the flag F0 is set to 1 A sixth step of returning to step 3 and checking if the flag F0 is 1 if the terminal P2 is not low; If the flag F0 is not 1, the process returns to the third stage, and if the flag F0 is 1, the seventh step of checking whether the value of the register R3 is greater than or equal to 4 and the value of the register R3 is less than 4 If so, the process returns to the fourth step. If the value of the register R3 is greater than or equal to 4, the eighth step of checking whether the value of the register R3 is greater than 8; If it is large, the data is set to 0, and the ninth step of checking whether one byte is over, if the one byte is not finished, the data is stored in the least significant bit of the register R1 and then returned to the second step. If one byte has ended, the one-byte data is stored in a designated place, the delay until the terminal P2 becomes " low ", and the procedure of the tenth step of returning to the first step is executed.

The operational effects of the data storage device of the answering machine of the present invention having the above-described configuration and processing are as follows.

First, important data in an answering machine, such as the number, length, and availability of recorded message, can be recorded in one area of the cassette tape for missed response and recording of message. The tape is used as a data backup medium in case of power failure.

That is, the area of the tape to be used is divided into a message recording area and a data backup area, the data is recorded in a predetermined area by the microprocessor 1, and when the power is turned on after a power failure, the contents recorded in the predetermined area are recorded. The data is read and returned to the internal memory of the microprocessor 1.

In the case of using an 8-bit microprocessor 1, the tone generation time of the tone generator 2 is controlled at the output port P1 to form data and then sent to the amplifier A.

For example, in the present invention, one-byte data is configured in the format of start bit + data bit + end bit, where data ("1") is composed of a tone format of 20m tone + 20m second, and data ("0"). ") Consists of 40m-second tone = 20m-second silent format, 8-bit START BIT consists of 60m-second tone + 60m-second silent format before the data bit, and stop bit (STOP BIT) Is composed of a 60m second tone + 60m second silent format at the end of the data bit.

Therefore, under such time control, the tone signal data generated in the tone generator 2 is amplified via the amplifier A, and this amplified signal is sent to the reproduction recording head 5 via the acoustic amplifier 3 Write to a certain area of the tape.

That is, when data is written to the tape by the microprocessor 1, the output port P0 is controlled by controlling the analog switch SW1, the output port P4 is controlled by the analog switch SW2, and then output. In the port P1, the tone generator 1 is operated at the above-described data configuration time intervals to generate a tone, and data is amplified through the amplifier A in the generated tone and the no signal section. When supplied to the input terminal A1 of A), the acoustic amplifier 3 outputs an input signal to the output terminal A3 and inputs it to the selection switch SW3.

When performing such a recording operation, the microprocessor 1 outputs a control signal (high signal) from the output port P3 to the control terminal C0 of the selector switch SW3 so that the selector switch SW3 is an acoustic amplifier ( To be selected as a path between the output terminal A3 of 3) and the playback and recording head 5;

That is, as shown in FIG. 2, when the high signal is output from the output port P3, the analog switch 102 is turned on, the analog switch 103 is turned off, and the transistor Q1 is turned on. As 101 is also turned off, only the signal path of the control and recording head 5-analog switch 102-sound amplifier output terminal A3 is configured.

Therefore, the data signal output from the output terminal A3 of the acoustic amplifier 3 is supplied to the reproduction and recording head 5 through the analog switch 102 of the selection switch SW3 and recorded in a certain area of the tape. .

FIG. 3 (a) shows a data structure and a recording control operation by the microprocessor 1 when writing data in this manner.

First, when recording, recording of data is controlled by the microprocessor 1 to control the motor drive unit to drive the motor M to drive the tape while receiving the other party's message from the trunk line L1 with the acoustic amplifier 3 and the selection switch. Supply to the playback and recording head 5 via SW3 to finish recording the message, move the tape to the data recording area, and execute as follows.

In the output port P1, the tone generator 2 is controlled as described above to output " high " for 60 m seconds and " low " for 60 m seconds to record a single tone, i.e., a start bit, to tape.

The tone generator 2 is then controlled at the output port P1 to output high for 20 m seconds and low for 20 m seconds to record data “1” on tape, or high for 40 m seconds and low for 20 m seconds. Record data "0" on the tape.

That is, the microprocessor 1 inputs the data stored in the internal data register R3, sets " 8 " in the data bit number register R4 so that 8-bit data processing can be searched, and then carry and Rotate left (1 bit shift to MSB side) to store carry (R3) in register (A) and check if carry occurs. )).

As a result of the check, if a carry occurs (meaning that the shifted-out bit is "1"). The microprocessor (1) controls the tone generator (2) to generate a single tone (TONE) for 20m seconds, to configure the silent data for 20m seconds, which is analog switch (SW1), amplifier (A), acoustic amplifier ( 3), feed to the playback and recording head 5 via the path of the selector switch SW3, record on tape (data "1"), and if no carry occurs, the tone generator 2 is controlled by the microprocessor 1. Record a single tone for 40m seconds, then silence for 20m seconds (data "0").

After writing one bit ("0" or "1") of data to the tape as described above, the value of the bit number register R4 is decreased (-1) to check whether the value of the register R4 is zero. .

If the value of the bit number register R4 is not " 0 ", the process returns to the above step of determining whether to carry by taking out the next bit 1 bit, and if the value of the register R4 is " 0 " In this case, the signal of high for 60 m seconds and low signal for 60 m seconds (recording on the tape) is recorded, and then the above steps are repeated from the first step to the next byte of data.

That is, when all 8 bits are recorded in the above-described order, and the end bits (60 m sec high and 60 m sec low) are recorded after that, the desired data is recorded on the tape.

On the other hand, when reading the data recorded on the tape as described above, the microprocessor 1 drives the motor M through the motor drive unit to drive the deck. Thus, the tape is driven and left in the playback state, and the data is recorded. After the tape is rotated to a predetermined position, data is reproduced by the reproducing and recording head 5 in a predetermined data area of the tape, and this reproduced signal is amplified through the acoustic amplifier 3, and then the microcomputer through the port P2. It enters the processor 1.

That is, the microprocessor 1 outputs a low signal at the output port P3.

Accordingly, the analog switch 102 of the selection switch SW3 is turned off, the analog switch 103 is turned on, the transistor Q1 is turned off, and the analog switch 101 is turned on.

Therefore, the data reproduced by the reproduction and recording head 5 is supplied to the input terminal A0 of the acoustic amplifier 3 through the analog switches 103 and 101, and the acoustic amplifier 3 is input to the input terminal A0. The amplified data signal is amplified and output to the output terminal A5.

The data signal output from the output terminal A5 is supplied to the input port P2 of the microprocessor 1, and the microprocessor 1 analyzes the high and low times of the signal coming into the port P2 to determine 8-bit. Convert to binary and return to the desired data.

When reproducing in this manner and storing data in the memory in the microprocessor 1, the signal input to the port P2 is "low" when there is an output signal (monotone) at the output terminal A5 of the acoustic amplifier 3. If it is silent, it becomes "high" state.

That is, the microprocessor 1 restores and stores data through a process as shown in FIG. 3 (b).

First, the register R1 (R2) for storing one byte of data is cleared to 0, the tire is operated for 5 m seconds, and then the flag F0 for data input retrieval and the register R3 for timer time retrieval are made. Clear to 0.

Then, it is determined whether 5 m seconds have elapsed, and if it has elapsed, the value of the timer search register R3 is increased (+1) while continuing to operate the 5 second timer, and when this value is larger than "12" (5 m seconds * 12 = 60 m seconds). That is, if data does not enter the input port P2 of the microprocessor 1 for 60 m seconds, it is an error. Therefore, the timer is stopped and the display returns to the first step after the error display.

However, if the search result of the input port P2 of the 5 m second microprocessor 1 is low (the tone signal to be reproduced is input), the data input flag F0 is set to "1" and then the 5 m second timer time search step. Redo, and searches for the flag (F0) if high (silent input).

If the flag F0 of this step is set to "1", the input port P2 of the microprocessor 1 is low (tone reproduction) →. It means that it has been changed to high (silent), so if the value of timer register R3 is searched and "4" (5m sec * 4 = 20msec), it is recognized as data "1" and stored in register R2, and "8" If "(5 m sec * 8 = 40 m sec), the data is recognized as" 0 "and stored in the register R1.

After all these operations are performed for 1 byte = 8 bits, the 1-byte data is stored in a designated place (internal memory address), and then waited for a predetermined time until the input port P2 becomes low, and then returns to the first step. The recovery operation on the byte data is continued as described above.

As described above, the microprocessor 1 detects the signal input to the input port P2, that is, the time when it is high and the time when it is low, so that the start bit, the data "0", the data "1", and the end are detected. When the 8 bits of data (1 byte) are formed by reading the bits in order, the data is returned to the memory in the microprocessor 1.

As described above, the device of the present invention can prevent data loss during a power failure, and can be applied to all answering machines for which a tape deck and a microprocessor are used.

Claims (1)

The microprocessor 1 controls the cassette deck motor M through the motor drive unit to record and control data on the cassette tape, and reads the data recorded on the tape and stores the data in the internal memory. A tone generator 2 for generating a control tone tone signal, a first analog switch SW1 for output control of the tone signal of the tone generator 2 under the control of the microprocessor 1, and the first 1 The amplifier A for amplifying the tone signal passing through the analog switch SW1 and supplying it to the acoustic amplifier 3 and the tone signal inputted from the amplifier A through the selector switch SW3. And a sound amplifier 3 for supplying the data reproduced from the reproduction and recording head 5 through the selection switch SW3 to the microprocessor 1, and to the microprocessor 1, Take control And a selection switch (SW3) configured to select a data input / output path between the sound amplifier (3) and the playback and recording head (5).

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