KR940004334B1 - Multiple video signal recording and reproducing apparatus for vcr - Google Patents

Abstract

The device includes a microprocessor (10) which controls a multitude of video signals (VSI11-VSI14) with a time division recording control method, an analog/digital converter (11) which converts output signals of a selective switch (SW11) into digital signal, a field memories (12A-12D) which save and output digital signals according to memory control signals (CS11-CS14), a digital/analog converter (13) which converts output signals of a selective switch (SW12) into analog signal, a brightness signal recorder and a color signal recorder (14 and 15), a mixer (16), a video signal amplifier (17), a voltage controlled oscillator (18), and a voice signal recorder (19).

Description

Video recorder and playback device of video cassette recorder

1 is a circuit diagram of a multiple video signal recording apparatus of the present invention.

2A to 2F are operational waveform diagrams of respective parts of FIG.

3 is an explanatory diagram showing recording trajectories of video signals and division control signals recorded on a video tape by the multiple video signal recording apparatus of the present invention.

4 is a circuit diagram of a multiple video signal reproducing apparatus of the present invention.

* Explanation of symbols for main parts of the drawings

1, 20: video tape 10, 24: microprocessor

11, 29: Analog-to-digital converter 12A-12D, 30A-30D: Field memory

13, 32: digital-to-analog converter 14: luminance signal recorder

15: color signal recorder 16, 28: mixer

17: image recording amplifier 18: voltage controlled oscillator

19: voice signal recorder 21: voice shear amplifier

22; Voice demodulator 23: frequency discriminator

25: image shear amplifier 26: luminance signal demodulation system

27: color signal demodulator 31: image processor

CVS: Time division signal CS11-CS14, CS21-CS24: Control signal

AHD11, AHD21: Voice Head VHD11, VHD21: Video Head

The present invention relates to a multiple video signal recording and reproducing apparatus of a video cassette recorder to record, reproduce and output a plurality of video signals input to one video tape using one video cassette recorder. An apparatus for recording and reproducing multiple video signals of a video cassette recorder for time division of video signals recorded on a video tape and a plurality of time-divided video signals mixed for output.

In general, major areas such as banks and museums use time-lapse video cassette recorders for surveillance purposes.

However, this time-lapse video cassette recorder can be monitored while recording and reproducing video signals recorded and output by one video camera. Of course, the use of a video cassette recorder for the labs, as well as the number of video cameras to use the monitor costs a lot of installation costs, which caused a lot of economic burden.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and time-divisionally divides a plurality of input image signals into one by one, sequentially converts them into digital signals, stores them in a plurality of memories, and stores them in a plurality of memories. Selected outputs and analog signals are sequentially converted into one by one, then processed and recorded on videotape, and then divided into multiple playback video signals using the division control signal that is played back, and then mixed output to PIP (Picture In Picture). The present invention provides a multi-video signal recording and reproducing apparatus capable of recording and reproducing a plurality of video signals with a single video cassette recorder as well as monitoring a single monitor, which will be described in detail with reference to the accompanying drawings. Explain.

1 is a circuit diagram of a multiple image signal recording apparatus of the present invention, as shown therein, a plurality of image signals while outputting a memory control signal CS11-CS14 and a level control signal LVS in accordance with a time division signal CVS. The microprocessor 10 for controlling time division recording of the VSI11-VSI14, a selection switch SW11 for selectively outputting a plurality of video signals VSI11-VSI14 according to the level control signal LVS, and the selection switch SW11. The digital signal of the analog / digital converter 11 for converting the output signal of the digital signal to the digital signal, and the video signal (VSI11-VSI14) output by the analog / digital converter 11, is converted into the memory control signal CS11-CS14. Field memory 12A-12D, which outputs midnight, respectively, and a selection switch SW12 for selectively outputting the output signal of the field memory 12A-12D according to the level control signal LVS, and the selection switch ( SW12) output signal to analog signal The digital signal to analog signal, the digital to analog converter 13 to convert the output signal of the selection switch SW12 into an analog signal, and the luminance signal from the output signal of the digital to analog converter 13; A luminance signal recorder 14 and a color signal recorder 15 for recording the color signals respectively, a mixer 16 for mixing output signals of the luminance signal recorder 14 and the color signal recorder 15, and the mixer An image recording amplifier 17 which applies the output signal of the 16 to the amplification and image head VHD11 and writes it on the video tape 1, and a voltage controlled oscillator 18 oscillating at a frequency according to the level control signal LVS. And an audio signal recorder 19 which applies the output signal of the voltage controlled oscillator 18 to the recording process and the audio head AHD11 and records it on the video tape 1.

The selection switches SW11 and SW12 are switched in accordance with the level of the level control signal LVS.

In the multiple video signal recording apparatus of the present invention configured as described above, as the time division signal CVS is input as shown in FIG. 2A, the microprocessor 10 divides the time division signal CVS at equal intervals, As shown in FIG. 2B, the level control signal VLS is output and the memory control signals CS11-CS14 are output as shown in FIG. 2C-F.

Then, the selector switch SW11 is switched in accordance with the level control signal LVS so that the movable terminals are cyclically connected to the fixed terminals a11, b11, c11, and d11, and selectively output the video signals VSI11-CSI14. The selected output video signals VSI11-CSI14 are converted into digital signals by the analog / digital converter 11 and input to the field memories 12A-12D.

At this time, when the selection switch SW11 selects and outputs the image signals VSI11, VSI12, VSI13, and CSI14 according to the level control signal LVS, the microprocessor 10 synchronizes with the memory control signal CS11. Since the field memories 12A-12D operate by outputting (CS12) (CS13) (CS14), the digital video signals VSI11-CSI14 are stored and output in the field memories 12A-12D, respectively.

In this way, the selector switch SW12 is switched between the digital image signals VSI11-CSI14 output by the field memories 12A-12D according to the level control signal LVS, and the movable terminals are fixed terminals a12, b12, c12, and the like. cyclically connected to d12) for selective output, and the output signal of the selection switch SW12 is converted into an analog signal by the digital-to-analog converter 13 and recorded by the luminance signal recorder 14 and the kali signal recorder 15 After processing, it is amplified by the image recording amplifier 17 and applied to the image head VHD11 and recorded on the video tape 1. Then, the voltage-controlled oscillator 18 oscillates at a frequency corresponding to the level of the level control signal LVS to output a division control signal, and the audio signal recording system 19 records the division control signal, and then the audio head AHD11. Is applied to and recorded on a videotape.

At this time, the oscillation frequency of the voltage-controlled oscillator 18 is varied in synchronization with the switching operation of the selection switches SW11 and SW12, and the video tape 1 has a division control signal having a different frequency in synchronization with the video signals VSI11-CSI14. Is recorded.

Here, referring to the recording track of the video tape 1, as shown in FIG. 3, a plurality of video signals VSI11-CSI14 are sequentially recorded on a video track and a division control signal F11 having a different frequency in an audio track. -F14 is recorded in synchronization with the video signals VSI11-CSI14.

4 is a circuit diagram of a multi-image signal reproducing apparatus of the present invention, as shown in this case, an audio shear amplifier 21 for amplifying a division control signal reproduced by an audio head AHD21 on a video tape 20, and A speech demodulator 22 for demodulating the speech signal from the output signal of the speech shear amplifier 21, a frequency discriminator 23 for discriminating the frequency of the output signal of the speech demodulator 22, and the frequency discriminator Microspeaker 24 for outputting control signals CS21-CS24 and video shear amplifier 25 for amplifying multiple video signals reproduced by video head VHD21 on video tape 21 in accordance with the discrimination signal of (23). And a mixer 28 for mixing the luminance signal and the output signal of the color signal demodulator 27 from the output signal of the image front end amplifier 25, and an analog for converting the output signal of the mixer 28 into a digital signal. / Digital converter 29 and the analog The output signal of the digital converter 29 is stored and output according to the control signals CS21-CS24 to distinguish multiple image signals, and the output signals of the field memories 30A-30D are displayed on one screen. An image processor 31 for processing and a digital-to-analog converter 32 for converting the output signal of the image processor 31 into analog signals. In the multiple video signal reproducing apparatus of the present invention configured as described above, the audio head AHD21 reproduces the division control signal in the audio track of the video tape 21, and the reproduced division control signal is demodulated in the audio demodulator 22 and the frequency is reproduced. It is input to the discriminator 23.

Then, the frequency discriminator 23 determines the frequency of the input division control signal and outputs a determination signal indicating the division of the multiple video signal to be reproduced, and according to the output determination signal, the microprocessor 24 sends the control signal CS21-. CS24) is output to control the operation of the field memories 30A-30D.

The video head VHD21 reproduces the multiple video signals in the audio track of the video tape 21, and the reproduced multiple video signals are amplified by the video shear amplifier 25, and the luminance signal demodulator 26 and the Kali signal demodulation are performed. The luminance signal and the color signal are demodulated in the tone controller 27, mixed in the mixer 28, and then demodulated into digital signals by the analog / digital modulator 29 and input to the field memories 30A-30D.

Then, the field memory 30A-30D stores and outputs the output signal of the analog / digital modulator 29 according to the control signals CS21-CS24 to distinguish the multiple image signals, and outputs the field memory 30A-30D. The signal is mixed in the image processor 31 and then converted into an analog signal in the digital / analog converter 32 and output.

Here, the image processor 31 performs PIP processing on a plurality of input video signals, and a plurality of video signals are displayed on the screen.

As described in detail above, the present invention records and reproduces a plurality of video signals using a single video cassette recorder to display a plurality of video signals on one monitor, thereby reducing the equipment cost when used for surveillance. have.

Claims (3)

A microprocessor 10 for controlling time-division recording of the plurality of video signals VSI11-VSI14 while outputting the memory control signals CS11-CS14 and the level control signal LVS according to the time division signal CVS; A selection switch SW11 for selectively outputting the video signals VSI11-VSI14 according to the level control signal LVS, and an analog / digital converter 11 for converting the output signal of the selection switch SW11 into a digital signal; A field memory 12A-12D for outputting a digital signal of the video signal VSI11-VSI14 output from the analog-to-digital converter 11 at midnight according to the memory control signal CS11-CS14, and the field memory 12A. A selection switch SW12 for selectively outputting the -12D output signal in accordance with the level control signal LVS, a digital to analog converter 13 for converting the output signal of the selection switch SW12 into an analog signal, Output of the digital-to-analog converter 13 A mixer 16 for mixing the luminance signal recorder 14 and the color signal recorder 15 for recording and processing the luminance signal and the color signal in the call, and the mixer 16 for mixing the output signals of the luminance signal recorder 14 and the color signal recorder 15, respectively. And an image recording amplifier 17 which applies the output signal of the mixer 16 to the amplification and image head VHD11 and writes it on the video tape 1, and oscillates at a frequency according to the level control signal LVS. A voltage controlled oscillator 18 and an audio signal recorder 19 which applies the output signal of the voltage controlled oscillator 18 to the recording process and the audio head AHD11 and records it on the video tape 1. Multiple video signal recording apparatus of a video cassette recorder. An audio shear amplifier 21 for amplifying the division control signal reproduced by the audio head AHD21 on the video tape 20, and an audio reconstruction system 22 for demodulating the audio signal from the output signal of the audio shear amplifier 21. And a frequency discriminator 23 for discriminating the frequency of the output signal of the voice demodulator 22, and a microprocessor for outputting control signals CS21-CS24 in accordance with the discrimination signal of the frequency discriminator 23 ( 24 and an image shear amplifier 25 for amplifying the multiple image signals reproduced by the image head VHD21 on the video tape 21, and a luminance signal and a color signal demodulator in the output signal of the image shear amplifier 25 ( A mixer 28 for mixing the output signals of the signal 27; an analog / digital converter 29 for converting the output signal of the mixer 28 into a digital signal; and an output signal of the analog / digital converter 29. Save and output according to the control signal (CS21-CS24) A field memory 30A-30D for classifying image signals, an image processor 31 for mixing and processing the output signals of the field memory 30A-30D so as to appear on one screen, and an output signal of the image processor 31; And a digital-to-analog converter (32) for converting an analog signal into a video cassette recorder. 3. The apparatus according to claim 2, wherein the image processor (31) performs a PIP process on the input digital image signal.