KR940000151B1 - Semiconductor ceramic meterials - Google Patents

Abstract

A grain boundary insulating type semiconducting porcelain material is characterized by consisting of (Sr100-xBax)TiO3 as a major component, mixture of CaZrO3, TiO3, and TiO2, and one of CaZrO3 and TiO2 as a subsidiary component, and the above components should satisfy the following equation, (Sr100-xBax)TiO3 + yCaZrO3 + 1.7TiO2, where, x is 0 < x < 1.5 and 0<=0.5. In this method, Al2O3 of 0-0.12 mol and SiO2 of 0-0.24 mol can be added for the ratio of Al/Si to be 1/2, elements of 0.15 mol with valence 3 and of 0.2 mol of valence 5 or 6 can be included as a semiconductor material, and trivalent, pentavalent, and hexavalent elements are Nd, Y and La, Ta and Nb, and W, respectively.

Description

Grain Boundary Insulation Semiconductor Ceramic Composition

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a grain boundary insulating semiconductor ceramic composition mainly based on strontium titanate (SrTiO ₃ ).

General outlines and features of the grain boundary insulating semiconductor capacitors used as passive components of electronic products are as follows. Due to the rapid miniaturization of electronic products, much research has been made on the development of materials having high dielectric constants in response to the demands of a small size and a high capacity capacitor. In the strontium titanate (SrTiO ₃ ), CaTiO ₃ , BaTiO _3, etc. are used as an auxiliary material, about 0-20 mol%, and rare earth elements Y, Nd, Na, Ce, or Nb, Ta, W are used to give high semiconductivity after reduction. after putting the valence control elements for from 0.05 to 0.5 wt%, and an insulating layer is formed easily to 0.01-0.2% of SiO _2, MnCO _3, GeO _2, and the weight of such uniformly mixed and molded, N ₂ / H _It bakes about 3 hours at 1,450 degreeC in ₂ reducing atmospheres. At this time, the fired porcelain exhibits a semiconductivity, and in order to make an insulating layer, a glass material made of PbO, B ₂ O ₃ , NaO, Bi ₂ O _3, etc. is coated and 2 hours at 1,100-1,200 ° C. in the air. When the heat treatment is performed, the glass penetrates into the grain boundaries of the semiconductor porcelain to form a grain boundary insulating layer, and the grain boundary insulation semiconductor porcelain is formed by forming metal electrodes on both surfaces.

The characteristics of the grain boundary insulating semiconductor magnetic capacitors include 1) high and stable dielectric constant over a wide frequency range, 2) excellent moisture resistance, 3) low dependence on dielectric constant, and 4) low frequency in the frequency domain. Has a stable dielectric loss.

In Japanese Patent Publication No. 57-132,316, SiO ₂ , CaO, and Nd ₂ O ₃ were added to SrTiO ₃ and Bi ₂ O ₃ , Cu ₂ O, MnO _2, and the like were infiltrated into the grain boundaries. A dielectric loss of about 0.4% was obtained. Japanese Unexamined Patent Publication No. (sho) 55-14665 arc in the crystal by the addition of such as CaTiO ₃ 15-25mol% and rare earth elements, or Nb, Ta, W to the grain boundary SrTiO _{3 PbO, B 2 O 3, CuO} , MnO, Bi 2 As a result of infiltration of O ₃ or the like, dielectric constants of about 80,000 and dielectric solels of about 1% were obtained. In addition, U.S. Patent No. 4,323,617 in the _{BaZrO 3, CaTiO 3, Y 2} O 3, CeO 2 , etc. to the mixture to obtain a top dielectric 63 000, the dielectric loss of 0.55% on a SrTiO _3. In other patents, the insulation resistance was low at several hundred MΩ when the dielectric constant was about 60,000.

According to the present invention improve this insulation resistance, such as and and the the grain boundary insulation type Presence of the semiconductor in order to improve the dielectric loss of SrTiO ₃ and BaCO ₃ and CaZrO ₃ as the base material, an excess in order to improve the reducing and facilitate the forming the insulating layer TiO ₂ is added. In addition, trivalent materials (Nd, Y, La, etc.) and five materials or hexavalent materials are added to give semiconductivity, and GeO ₂ , Al ₂ O ₃ , SiO ₂ , MnCO to facilitate the formation of grain boundary layers. ₃ , Ta ₂ O ₅ and the like are added. When Al ₂ O ₃ was added, high dielectric constant and insulation resistance were obtained when the ratio was Al / Si = 1/2.

Hereinafter, the present invention will be described in more detail with reference to Examples.

Example 1

(Sr _100-X Ba _X ) TiO ₃ + y CaZrO ₃ +1.7 TiO ₂

In the above formula, x is 0.0 to 1.3 y is 0.0 to 0.5, 0.12 mol of Al ₂ O ₃ , 0.24 mol of SiO ₂ , and Nd as trivalent, N5 as 0.15 mol and 0.2 mol, respectively. (Additionally, 0.12 mol of Ta ₂ O ₅ , 0.15 mol of GeO ₂ and 0.23 mol of MnCO ₃ can be added as additives), mixed with water and dried, and then the powder calcined at 1,000 ° C. for 3 hours is pulverized. It was molded to a thickness of 0.5 mm, a diameter of 12 mm, and a molding density of 2.4 g / cm 3 using an organic binder. Subsequently, the temperature was raised to 350 ° C. in an atmosphere for 12 hours and maintained at the same temperature for 2 hours to completely remove the organic binder from the molded body. Subsequently, the specimen was cooled to room temperature and calcined at 1,450 ° C. for 3 hours under a gas atmosphere having a ratio of N ₂ / H ₂ = 95/5 to form a semiconducting porcelain. 50% by weight of lead oxide, 44.5% by weight of bismuth oxide, 5% by weight of boron oxide, and 0.5% by weight of alumina were coated on the surface of the semiconductive porcelain and heat-treated at 1,100 ° C-1,150 ° C for 2 hours. After the insulating layer was formed on the grain boundary layer of the porcelain, silver electrodes were coated on both surfaces. The electrical characteristics for each composition of the grain boundary insulation magnetic capacitor thus obtained are shown in Tables 1 and 2.

TABLE 1

* Is the sample applied in Example 2

TABLE 2

Example 2

After calcining and molding the same composition as in Example 1, the specimens calcined at 1,450 ° C. for 3 hours at atmospheric pressure were cooled to room temperature, and then calcined at 1,450 ° C. for 3 hours under a gas atmosphere of N ₂ / H ₂ = 95/5. After the electrical properties through the same process as in Example 1 are shown in Table 3.

TABLE 3

Claims (4)

(Sr _100-X Ba _X ) TiO ₃ as a main component, and a mixture of CaZrO ₃ and TiO ₃ and TiO ₂ , or CaZrO ₃ and TiO ₂ as a minor component, and these components satisfy the following formula A grain boundary insulating semiconductor ceramic composition. (Sr _100-X Ba _X ) TiO ₃ + y CaZrO ₃ +1.7 TiO ₂ (wherein x is a positive number of 0 <x <1.5 and y is a number of 0 ≦ y <0.5) The grain boundary insulating semiconductor ceramic composition according to claim 1, further comprising 0-0.12 mol of Al ₂ O ₃ and 0-0.24 mol of SiO _{2 such} that the Al / Si ratio is 1/2. The grain boundary insulating semiconductor ceramic composition according to claim 1, further comprising 0.15 mol of a trivalent element and 0.2 mol of a pentavalent or hexavalent element as a semiconducting material. 4. The grain boundary insulating semiconductor ceramic composition according to claim 3, wherein the three elements are Nd, Y or La, the pentavalent element is Ta, Nb, and the hexavalent element is W.