KR930022328A - VTR video signal processing circuit - Google Patents

VTR video signal processing circuit Download PDF

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Publication number
KR930022328A
KR930022328A KR1019920005551A KR920005551A KR930022328A KR 930022328 A KR930022328 A KR 930022328A KR 1019920005551 A KR1019920005551 A KR 1019920005551A KR 920005551 A KR920005551 A KR 920005551A KR 930022328 A KR930022328 A KR 930022328A
Authority
KR
South Korea
Prior art keywords
terminal
voltage
transistor
input terminal
nvhs
Prior art date
Application number
KR1019920005551A
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Korean (ko)
Other versions
KR940011375B1 (en
Inventor
목도상
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920005551A priority Critical patent/KR940011375B1/en
Publication of KR930022328A publication Critical patent/KR930022328A/en
Application granted granted Critical
Publication of KR940011375B1 publication Critical patent/KR940011375B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

본 발명은 비디오 테이프 레코더(Video Tape Recorder)에 있어서 특히 VHA(Video Home System)방식의 비디오 테이프 레코더의 S/N 개선을 위한 영상회로 처리신호에 관한 것으로, 전원전압 단자와, 비디오신호 입력단자와, 제1레벨의 전압이 인가될때 NVHS 모드를 선택하는 SVHS/NVHS모드 선택단자와, 소정 모드시 제1및 제2레벨의 전압이 순처작으로 인가되는 헤드스위치 펄스 입력단자와, 비디오신호 출력단자와, 일정 레벨의 전압이 인가된 바이어스 입력단자와, 접지전압단자와, 상기 입력단자와 출력단자 사이에 접속되고 트랜지션 매칭된 일련의 트랜지스터들과, 상기 SVHS/NVHS 모드 선택 단자에 베이스가 연결된 제1트랜지스터와, 상기 제1트랜지스터의 온 또는 오프에 의해 제어되고 상기 일련의 트랜지스터들 중 소정의 트랜지스터와 접지사이에 연결된 제2, 제3 및 제4트랜지스터와, 상기 헤드스위치 펄스 입력단자에 인가되는 전압레벨에 의해 온 또는 오프가 제어되는 제5트랜지스터와, 상기 제5트랜지스터에 의해 제어되는 소정갯수의 트랜지스터들을 구비하여 NVHS방식과 SVHS방식 겸용으로 1/2fH캐리어 시프트가 가능한 영상시호 처리 회로를 제공한다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a video circuit processing signal for S / N improvement of a video tape recorder of a VHA (Video Home System) system. The present invention relates to a power supply voltage terminal and a video signal input terminal. SVHS / NVHS mode selection terminal for selecting the NVHS mode when the voltage of the first level is applied, a head switch pulse input terminal to which the voltage of the first and second levels are sequentially applied in the predetermined mode, and a video signal output terminal. And a bias input terminal to which a voltage of a predetermined level is applied, a ground voltage terminal, a series of transistors connected and transition-matched between the input terminal and the output terminal, and a base connected to the SVHS / NVHS mode selection terminal. A first transistor, second, third and controlled by on or off of the first transistor and connected between a predetermined transistor of the series of transistors and a ground; Four transistors, a fifth transistor whose on or off is controlled by a voltage level applied to the head switch pulse input terminal, and a predetermined number of transistors controlled by the fifth transistor are provided for both NVHS and SVHS methods. An image signal processing circuit capable of 1 / 2f H carrier shift is provided.

Description

VTR의 영상신호 처리회로VTR video signal processing circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 회로도.1 is a circuit diagram according to the present invention.

제2도는 비디오 신호와 주파수 변조 관계도.2 is a video signal and frequency modulation relationship diagram.

Claims (1)

VTR의 영상신호 처리 회로에 있어서, 전원전압 단자와, 비디오신호 입력단자와, 제1레벨의 전압이 인가될때 SVHS 모드를 선택하고 제2레벨의 전압이 인가될때 NVHS모드를 선택하는 SVHS/NVHS 모드 선택단자와, 소정모드시 제1및 제2레벨의 전압이 순차적으로 인가되는 헤드 스위치 펄스 입력단자와, 비디오 신호 출력단자와, 일정 레벨의 전압이 인가된 바이어스 입력단자와, 접지전압단자와, 상기 입력단자와 출력단자 사이에 접속되고 트랜지션 매칭된 일련의 트랜지스터들과, 상기SVHS/NVHS모드선택 단자에 베이스가 연결된 제1트랜지스터와, 상기 제1트랜지스터의 온 또는 오프에 의해 제어되고 상기 일련의 트랜지스터들중 소정의 트랜지스터와 접지사이에 연결된 제2 제3및 제4트랜지스터와, 상기 헤드 스위치 펄스 입력단자에 인가되는 전압레벨에 의해 온 또는 오프가 제어되는 제5프랜지스터와, 상기 제5트랜지스터에 의해 제어되는 소정갯수의 트랜지스터들을 구비함을 특징으로 하는 VTR의 영상신호 처리회로.In the video signal processing circuit of the VTR, the SVHS / NVHS mode which selects the SVHS mode when the power supply terminal, the video signal input terminal, and the voltage of the first level is applied, and the NVHS mode when the voltage of the second level is applied. A selection terminal, a head switch pulse input terminal to which voltages of first and second levels are sequentially applied in a predetermined mode, a video signal output terminal, a bias input terminal to which a predetermined level of voltage is applied, a ground voltage terminal, A series of transistors connected and transition-matched between the input terminal and the output terminal, a first transistor having a base connected to the SVHS / NVHS mode selection terminal, and controlled by on or off of the first transistor The second third and fourth transistors connected between a predetermined one of the transistors and ground, and a voltage level applied to the head switch pulse input terminal. Fifth flange requester and, VTR video signal processing circuit, characterized in that the transistor having a predetermined number that is controlled by the fifth transistor is turned off is controlled. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920005551A 1992-04-03 1992-04-03 Image treatment circuit for vtr KR940011375B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920005551A KR940011375B1 (en) 1992-04-03 1992-04-03 Image treatment circuit for vtr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920005551A KR940011375B1 (en) 1992-04-03 1992-04-03 Image treatment circuit for vtr

Publications (2)

Publication Number Publication Date
KR930022328A true KR930022328A (en) 1993-11-23
KR940011375B1 KR940011375B1 (en) 1994-12-07

Family

ID=19331324

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920005551A KR940011375B1 (en) 1992-04-03 1992-04-03 Image treatment circuit for vtr

Country Status (1)

Country Link
KR (1) KR940011375B1 (en)

Also Published As

Publication number Publication date
KR940011375B1 (en) 1994-12-07

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