KR930018452A - Data processing method of flat panel display panel - Google Patents
Data processing method of flat panel display panel Download PDFInfo
- Publication number
- KR930018452A KR930018452A KR1019920002396A KR920002396A KR930018452A KR 930018452 A KR930018452 A KR 930018452A KR 1019920002396 A KR1019920002396 A KR 1019920002396A KR 920002396 A KR920002396 A KR 920002396A KR 930018452 A KR930018452 A KR 930018452A
- Authority
- KR
- South Korea
- Prior art keywords
- electrode
- period
- bits
- data
- driving circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
- G09G3/06—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
본 발명은 제1전극과 제2전극을 가지는 평판형 표시판넬과 상기 제1전극을 구동하기 위한N비트의 데이타를 처리하는 제1전극 구동회로와, 상기 제2전극을 구동하기 위한 제2전극 구동회로를 구비한 평판형 표시판넬의 데이타 처리방법에 있어서, 제1기간에 하나의 화면분의 데이타를 제1신호에 응답하여 입력하고, 제1기간의 반주기에 하나의 화면분의 반을 표시하고 제1기간의 나머지 반주기에 하나의 화면분의 나머지반을 표시하고, 제2전극 구동회로의 스캔구동주기가 상기 제1신호의 두배에 해당하며, 2n비트의 데이타를 n비트씩 구분하여, n비트를 먼저 상기 제1전극구동회로에 입력하여 표시하고 난후, 나머지 n비트를 상기 제1전극 구동회로에 입력하여 반복적으로 표시하는 것을 특징으로 한다. 따라서, n비트 데이타 구동회로의 사용이 가능하고, 고계조의 표시가 가능하다.The present invention provides a flat panel display panel having a first electrode and a second electrode, a first electrode driving circuit for processing N bits of data for driving the first electrode, and a second electrode for driving the second electrode. In the data processing method of a flat panel display panel provided with a driving circuit, data of one screen is input in response to a first signal in a first period, and half of one screen is displayed in a half cycle of the first period. And displays the other half of one screen in the remaining half period of the first period, and the scan driving period of the second electrode driving circuit corresponds to twice the first signal, dividing 2n bits of data by n bits, n bits are first inputted to the first electrode driver circuit for display, and then n bits are inputted to the first electrode driver circuit for display. Therefore, n-bit data driving circuits can be used, and high gradation display is possible.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 따른 평판형 표시판넬의 데이타 처리방법이 적용될 종래의 평판형 표시판넬의 구동회로의블럭도를 나타태는 것이다. 제2A~2I도는 본 발명에 따른 평판형 표시판넬의 데이타 처리방법을 설명하기 위한 타이밍도를 나타내는 것이다.1 shows a block diagram of a driving circuit of a conventional flat panel display panel to which the data processing method of the flat panel display panel according to the present invention is applied. 2A to 2I show timing charts for explaining the data processing method of the flat panel display panel according to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920002396A KR940007499B1 (en) | 1992-02-18 | 1992-02-18 | Data operating method in display panel of flat type |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920002396A KR940007499B1 (en) | 1992-02-18 | 1992-02-18 | Data operating method in display panel of flat type |
Publications (2)
Publication Number | Publication Date |
---|---|
KR930018452A true KR930018452A (en) | 1993-09-22 |
KR940007499B1 KR940007499B1 (en) | 1994-08-18 |
Family
ID=19329127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920002396A KR940007499B1 (en) | 1992-02-18 | 1992-02-18 | Data operating method in display panel of flat type |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940007499B1 (en) |
-
1992
- 1992-02-18 KR KR1019920002396A patent/KR940007499B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR940007499B1 (en) | 1994-08-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5122790A (en) | Liquid crystal projection apparatus and driving method thereof | |
KR100303206B1 (en) | Dot-inversion liquid crystal panel drive device | |
KR900016936A (en) | Driving device for driving matrix LCD device | |
JP2002221949A (en) | Liquid crystal display device and gradation voltage generating circuit for the same device | |
KR950001348A (en) | Driving Method of Liquid Crystal Display | |
KR930002862A (en) | Display device and its driving method | |
KR960030066A (en) | Driving apparatus and method of thin film transistor liquid crystal display device | |
KR900015053A (en) | Multi Gradient Display | |
KR910003561A (en) | Display device | |
KR950020377A (en) | LCD panel driver | |
KR20010036308A (en) | Liquid Crystal Display apparatus having a hetro inversion method and driving method for performing thereof | |
KR930018452A (en) | Data processing method of flat panel display panel | |
KR970050065A (en) | LCD and its driving method | |
KR910013036A (en) | Display control method and display control device for ferroelectric liquid crystal panel | |
KR940013190A (en) | Drive circuit of display device | |
JPS58169190A (en) | Liquid crystal display unit | |
KR100656903B1 (en) | Liquid crystal display apparatus for reduction of flickering | |
JPH05108032A (en) | Liquid crystal driving system | |
KR950033567A (en) | Display Control Method and Circuit of Liquid Crystal Display Panel | |
KR100606957B1 (en) | Apparatus of Character Type TFT LCD and Driving Method of Character Type TFT LCD | |
JP3241256B2 (en) | Driving method of simple matrix liquid crystal display device | |
KR100331886B1 (en) | Driving apparatus of lcd | |
KR20020065991A (en) | A liquid crystal display device for thin film transistor | |
JP2562392B2 (en) | Liquid crystal display | |
JPS5852595B2 (en) | Driving method of matrix type liquid crystal display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |