KR930018380A - Interface device of PLC system - Google Patents

Interface device of PLC system Download PDF

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Publication number
KR930018380A
KR930018380A KR1019920001964A KR920001964A KR930018380A KR 930018380 A KR930018380 A KR 930018380A KR 1019920001964 A KR1019920001964 A KR 1019920001964A KR 920001964 A KR920001964 A KR 920001964A KR 930018380 A KR930018380 A KR 930018380A
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South Korea
Prior art keywords
controller
output
control
state buffer
input
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KR1019920001964A
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Korean (ko)
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KR940004572B1 (en
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김동일
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강진구
삼성전자 주식회사
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Priority to KR1019920001964A priority Critical patent/KR940004572B1/en
Publication of KR930018380A publication Critical patent/KR930018380A/en
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Publication of KR940004572B1 publication Critical patent/KR940004572B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Programmable Controllers (AREA)

Abstract

본 발명 PLC 시스템의 인터페이스장치는, 중앙연산처리장치와 메모리장치를 구비하여서 내장된 프로그램에 따라 NC 콘트롤등을 제어하는 PLC시스템에 있어서, 상기 메모리장치와 쌍방향성 버스로 연결되어 입·출력되는 데이터의 출력을 완충시키도록된 제3상태 버퍼와, 이 제3상태 버퍼와 상기 NC콘트롤러 사이에 쌍방향성 버스로 연결되어 상기 NC콘트롤러부터 입·출력되는 데이터의 어드레스를 지정해주도록된 어드레스 레치, 상기 제3상태 버퍼와 상기 NC콘트롤러사이에 쌍방향성 버스로 연결되어 상기 NC콘트롤러와 상기 메모리장치로 부터 로드된 데이터를 동작제어신호에 의해 입·출력시키도록된 데이터 레치, 상기 중앙연산처리장치와 상기 제3상태 버퍼를 거쳐 상기 메모리장치 사이에 쌍방향성 버스를 연결되어 상기 중앙연산처리장치의 동작여부를 검출한 다음 그 동작여부를 판단하여 상기 NC 콘트롤러의 입·출력데이타를 동작제어하도록된 검출제어회로부, 상기 NC콘트롤러와 상기 검출제어회로부 사이에 쌍방향성 버스로 연결되어 상기 검출제어회로부의 동작제어신호에 따라 상기 NC 콘트롤러로 상기 동작제어신호를 로드시키도록된 콘트롤 레지스터로 이루어진 것을 특징으로 한다.The interface device of the PLC system of the present invention is a PLC system including a central processing unit and a memory device to control NC control in accordance with a built-in program, wherein the data is connected to the memory device via an interactive bus and input / output. A third state buffer configured to buffer an output of the first address buffer; an address latch connected to the third state buffer and the NC controller by an interactive bus to address data input and output from the NC controller; A data latch connected by a bidirectional bus between a three-state buffer and the NC controller to input / output data loaded from the NC controller and the memory device by an operation control signal, the central processing unit and the first processor; A bidirectional bus is connected between the memory devices via a three-state buffer to allow operation of the central processing unit. A detection control circuit unit configured to control an input / output data of the NC controller by detecting a part after detecting the unit, and connected to the bidirectional bus between the NC controller and the detection control circuit unit to control operation of the detection control circuit unit. And a control register configured to load the operation control signal into the NC controller according to the signal.

Description

PLC 시스템의 인터페이스 장치Interface device of PLC system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 장치를 설명하기 위한 블럭도이고, 제2도 (a),(b),(c),(d)는 본 발명 장치 각 부분의 신호파형을 나타낸 파형도이다.FIG. 1 is a block diagram for explaining the apparatus of the present invention, and FIG. 2 (a), (b), (c) and (d) are waveform diagrams showing signal waveforms of respective parts of the apparatus of the present invention.

Claims (1)

중앙연산처리장치(1)와 메모리장치(2)를 구비하여 내장된 프로그램에 따라 NC 콘트롤러(3)등을 제어하는 PLC시스템의 인터페이스장치에 있어서, 상기 메모리장치(2)와 쌍방향성 버스로 연결되고 입·출력되는 데이타의 출력을 완충시키도록된 제3상태 버퍼(4)와, 이 제3상태 버퍼(4)와 상기 NC콘트롤러(3) 사이에 쌍방향성 버스로 연결되어 상기 NC콘트롤러(3)로 부터 입·출력되는 데이터의 어드레스를 지정해주도록된 어드레스 레치(5), 상기 제3스테이트 버퍼(4)와 상기 NC콘트롤러(3) 사이에 쌍방향성 버스로 연결되고 상기 NC 콘트롤러(3)와 상기 메모리장치(2)로 부터 로드된 데이터를 동작제어신호에 의해 입·출력시키도록된 데이터 레치(6), 상기 중앙연산처리장치(1)와 상기 제3상태 버퍼(4)로 거쳐 상기 메모리장치(2) 사이에 쌍방향성 버스로 연결되어 상기 중앙연산처리장치(1)의 동작여부를 검출한다음 그 동작여부를 판단하여 상기 NC콘트롤러(3)의 입·출력데이터를 동작제어하도록 된 검출제어회로부(7), 상기 NC콘트롤러(3)와 상기 검출제어회로부(7) 사이에 쌍방향성 버스로 연결되어 상기 검출제어회로부(7)의 동작제어신호에 따라 상기 NC콘트롤러(3)로 상기 동작제어신호를 로드시키도록된 콘트롤레지스터(8)로 이루어진 것을 특징으로 하는 PLC 시스템의 인터페이스 장치.An interface device of a PLC system having a central processing unit (1) and a memory device (2) to control the NC controller (3) or the like according to a built-in program, which is connected to the memory device (2) by an interactive bus. And a third state buffer 4 configured to buffer the output of data inputted and outputted, and connected to the NC controller 3 by an interactive bus between the third state buffer 4 and the NC controller 3. The address latch 5, which is configured to address data input and output from the control panel, is connected to the NC controller 3 by an interactive bus between the third state buffer 4 and the NC controller 3. The memory loaded through the data latch 6, the central processing unit 1, and the third state buffer 4 to input and output data loaded from the memory device 2 by an operation control signal; The device 2 is connected by a bidirectional bus The detection control circuit unit 7 and the NC controller 3 which detect the operation of the operation unit 1 and determine whether the operation is performed, and control the input / output data of the NC controller 3. The control register 8 is connected between the detection control circuit 7 by a bidirectional bus and loads the operation control signal to the NC controller 3 in accordance with the operation control signal of the detection control circuit 7. Interface device of the PLC system, characterized in that made. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920001964A 1992-02-11 1992-02-11 Interface unit in programmable logic controller system KR940004572B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920001964A KR940004572B1 (en) 1992-02-11 1992-02-11 Interface unit in programmable logic controller system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920001964A KR940004572B1 (en) 1992-02-11 1992-02-11 Interface unit in programmable logic controller system

Publications (2)

Publication Number Publication Date
KR930018380A true KR930018380A (en) 1993-09-21
KR940004572B1 KR940004572B1 (en) 1994-05-25

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Application Number Title Priority Date Filing Date
KR1019920001964A KR940004572B1 (en) 1992-02-11 1992-02-11 Interface unit in programmable logic controller system

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KR940004572B1 (en) 1994-05-25

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