KR930016892A - Bus occupancy signal generation circuit of round robin serial bus communication system - Google Patents

Bus occupancy signal generation circuit of round robin serial bus communication system Download PDF

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Publication number
KR930016892A
KR930016892A KR1019920000091A KR920000091A KR930016892A KR 930016892 A KR930016892 A KR 930016892A KR 1019920000091 A KR1019920000091 A KR 1019920000091A KR 920000091 A KR920000091 A KR 920000091A KR 930016892 A KR930016892 A KR 930016892A
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South Korea
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signal
bus
count
bus occupancy
round robin
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KR1019920000091A
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Korean (ko)
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KR940010136B1 (en
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문강양
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정용문
삼성전자 주식회사
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Priority to KR1019920000091A priority Critical patent/KR940010136B1/en
Publication of KR930016892A publication Critical patent/KR930016892A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)

Abstract

라운드 로빈 방식의 시리얼 버스 통신 시스템의 시리얼 버스 중재 로직에 있어서 각 버스 마스터간에 로컬 카운트 로딩값의 차를 최소로 할 수 있도록 버스 점유 신호를 발생하는 회로도이다.In the serial bus arbitration logic of a round robin serial bus communication system, a bus occupancy signal is generated so as to minimize a difference in local count loading values between bus masters.

이를 위하여 상기 호스트 컴퓨터로 송신할 메시지가 있을 경우 어서트 되는 송신준비 신호를 데이타 송신 클럭 신호와 동기시키며, 상기 동기된 송신준비 신호가 어서트되어 있는 상태에서 상기 카운트 완료신호의 입력에 의해 버스점유 신호를 발생한다.To do this, when there is a message to be transmitted to the host computer, the asserted transmission ready signal is synchronized with the data transmission clock signal, and the bus is occupied by the input of the count completion signal while the synchronized transmission ready signal is asserted. Generate a signal.

따라서 불필요한 카운트 공전을 제거함으로써 버스의 사용효율을 향상 시킨다.This improves bus utilization efficiency by eliminating unnecessary count idle.

Description

라운드 로빈 방식의 시리얼 버스 통신 시스템의 버스 점유 신호발생회로Bus occupancy signal generation circuit of round robin serial bus communication system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 라운드 로빈 방식의 시리얼 버스 통신 시스템의 개략구성도, 제4도는 본 발명에 따른 버스 점유 신호발생 회로도.1 is a schematic configuration diagram of a round robin serial bus communication system, and FIG. 4 is a bus occupancy signaling circuit diagram according to the present invention.

Claims (4)

호스트 컴퓨터와 다수의 버스 마스터간에 라운드 로빈 방식의 시리얼 버스 통신을 위하여 미리 셋팅되어 있는 로컬 카운트 값을 로딩하여 설정값까지 카운팅 완료시 카운트 완료신호를 발생하는 로컬 카운트회로(10)를 구비한 라운드 로빈 방식의 시리얼 버스 통신 시스템에 있어서, 상기 오스트 컴퓨터로 송신할 메시지가 있을 경우 어서트되는 송신준비 신호를 데이타 송신 클럭신호와 동기시키는 동기수단과, 상기 동기된 송신준비 신호가 어서트되어 있는 상태에서 상기 카운트 완료신호의 입력에 의해 버스점유 신호를 발생하는 버스점유 신호발생 수단으로 구성하는 것을 특징으로 하는 버스점유 신호발생회로.Round robin with local count circuit 10 which loads preset local count value for round robin serial bus communication between host computer and multiple bus masters and generates count completion signal when counting is completed up to setting value A serial bus communication system, comprising: synchronizing means for synchronizing a transmission ready signal that is asserted when there is a message to be transmitted to the host computer with a data transmission clock signal, and in a state where the synchronized transmission ready signal is asserted And bus occupancy signal generating means for generating a bus occupancy signal upon input of the count completion signal. 제1항에 있어서, 상기 동기수단이 상기 송신 준비 신호를 상기 데이타 송신 클럭신호에 의해 래치하는 래치소자인 것을 특징으로 하는 버스점유 신호발생회로.2. A bus occupancy signal generation circuit according to claim 1, wherein said synchronization means is a latch element for latching said transmission ready signal by said data transmission clock signal. 제2항에 있어서, 상기 회로가 초기화를 위한 리세트 신호와 상기 송신준비 신호를 논리 곱하여 상기 래치소자에 인가하는 논리게이트를 더 구비하는 것을 특징으로 하는 버스점유 신호발생회로.3. The bus occupancy signal generating circuit according to claim 2, wherein the circuit further comprises a logic gate for applying a logic signal to the latch element by multiplying a reset signal for initialization and the transmission ready signal. 제2항에 있어서, 상기 버스점유 신호발생 수단이 상기 래치소자에 래치되어 있는 송신 준비 신호와 상기 로컬 카운트회로(10)의 카운트 완료신호를 논리곱하는 논리게이트인 것을 특징으로 하는 버스점유 신호발생회로.3. The bus occupancy signal generation circuit according to claim 2, wherein the bus occupancy signal generation means is a logic gate that logically multiplies the transmission ready signal latched by the latch element and the count completion signal of the local count circuit 10. . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920000091A 1992-01-07 1992-01-07 Circuit for generating signals that inform taking the bus KR940010136B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920000091A KR940010136B1 (en) 1992-01-07 1992-01-07 Circuit for generating signals that inform taking the bus

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Application Number Priority Date Filing Date Title
KR1019920000091A KR940010136B1 (en) 1992-01-07 1992-01-07 Circuit for generating signals that inform taking the bus

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KR930016892A true KR930016892A (en) 1993-08-30
KR940010136B1 KR940010136B1 (en) 1994-10-22

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100369092B1 (en) * 1995-03-31 2003-06-19 모토로라 인코포레이티드 A method of providing an address signal and a data signal from a data processor,

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100369092B1 (en) * 1995-03-31 2003-06-19 모토로라 인코포레이티드 A method of providing an address signal and a data signal from a data processor,

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KR940010136B1 (en) 1994-10-22

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