KR930011975U - Common memory interface device - Google Patents

Common memory interface device

Info

Publication number
KR930011975U
KR930011975U KR2019910020174U KR910020174U KR930011975U KR 930011975 U KR930011975 U KR 930011975U KR 2019910020174 U KR2019910020174 U KR 2019910020174U KR 910020174 U KR910020174 U KR 910020174U KR 930011975 U KR930011975 U KR 930011975U
Authority
KR
South Korea
Prior art keywords
interface device
memory interface
common memory
common
memory
Prior art date
Application number
KR2019910020174U
Other languages
Korean (ko)
Other versions
KR940006298Y1 (en
Inventor
김장익
Original Assignee
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사 filed Critical 주식회사 금성사
Priority to KR2019910020174U priority Critical patent/KR940006298Y1/en
Publication of KR930011975U publication Critical patent/KR930011975U/en
Application granted granted Critical
Publication of KR940006298Y1 publication Critical patent/KR940006298Y1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663—Access to shared memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
KR2019910020174U 1991-11-22 1991-11-22 Dual memory interface unit KR940006298Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910020174U KR940006298Y1 (en) 1991-11-22 1991-11-22 Dual memory interface unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910020174U KR940006298Y1 (en) 1991-11-22 1991-11-22 Dual memory interface unit

Publications (2)

Publication Number Publication Date
KR930011975U true KR930011975U (en) 1993-06-25
KR940006298Y1 KR940006298Y1 (en) 1994-09-16

Family

ID=19322770

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910020174U KR940006298Y1 (en) 1991-11-22 1991-11-22 Dual memory interface unit

Country Status (1)

Country Link
KR (1) KR940006298Y1 (en)

Also Published As

Publication number Publication date
KR940006298Y1 (en) 1994-09-16

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