KR930011748A - Delayed Luminance Color Separation Circuit - Google Patents

Delayed Luminance Color Separation Circuit Download PDF

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Publication number
KR930011748A
KR930011748A KR1019910021820A KR910021820A KR930011748A KR 930011748 A KR930011748 A KR 930011748A KR 1019910021820 A KR1019910021820 A KR 1019910021820A KR 910021820 A KR910021820 A KR 910021820A KR 930011748 A KR930011748 A KR 930011748A
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KR
South Korea
Prior art keywords
signal
video signal
color
delayed
luminance
Prior art date
Application number
KR1019910021820A
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Korean (ko)
Inventor
윤석호
Original Assignee
강진구
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019910021820A priority Critical patent/KR930011748A/en
Publication of KR930011748A publication Critical patent/KR930011748A/en

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Abstract

비데오 신호중의 휘도 및 칼라신호를 분리함에 있어서, 완벽한 분리가 행하여 지지않아 칼라경계면이나 도트칼라 발생의 문제점을 해결하고자 1H지연기(10)(20)에서 비데오 신호를 지연시킨후 지연되지 않은 신호와 1H지연되어 반전된 신호 및 2H지연된 신호를 중간식 검출기(80)에서 상호 최대치만 가산하고 가산된 신호의 최소치만 가산하여 칼라신호를 분리해내고 분리된 칼라신호와 1H지연된 비데오 신호를 믹서기(30)에서 믹서시켜 휘도신호를 분리해 내도록 한 것으로써 휘도 및 칼라신호의 분리가 완전히 이루어져 휘도신호의 칼라신호에 대한 간섭과 칼라신호의 휘도신호에 대한 간섭을 없애게 된다.In separating the luminance and color signals in the video signal, the signal is not delayed after delaying the video signal in the 1H delayers 10 and 20 in order to solve the problem of color boundary or dot color generation. The 1H delayed inverted signal and the 2H delayed signal are added to each other only by the intermediate detector 80, and only the minimum value of the added signal is added to separate the color signal, and the separated color signal and the 1H delayed video signal are mixed in the mixer (30). In order to separate the luminance signal by mixing, the luminance and the color signal are completely separated, thereby eliminating interference with the luminance signal of the luminance signal and the luminance signal of the color signal.

Description

지연형 휘도칼라 분리회로Delayed Luminance Color Separation Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 실시 회로도.1 is an implementation circuit diagram of the present invention.

제3도는 본 발명의 휘도 칼라 분리 상태도.3 is a luminance color separation state diagram of the present invention.

Claims (2)

비데오 신호중의 휘도 및 칼라신호를 분리하는 분리회로에 있어서, 입력 비데오 신호를 순차적으로 1H지연시키는 1H지연기(10)(20)와, 입력 비데오 신호와 1H지연기(10)(20)에서 1H 및 2H지연된 비데오 신호 대역만 통과시키는 대역 통과필터(40)(50)(60)와, 상기 대역통과필터(40)(60)의 출력과 대역통과필터(50)의 출력을 인버터(70)에서 반전시킨 신호를 상호 최대치만 가산하고 가산된 신호의 최소치만 가산하여 칼라신호를 분리하는 중간시 검출기(80)와, 상기 중간신 검출기(80)의 칼라신호와 1H지연기(10)의 비데오 신호를 가산하여 휘도신호를 분리하는 믹서기(30)를 구성시킨 지연형 휘도칼라 분리회로.In a separation circuit for separating luminance and color signals in a video signal, 1H delayers 10 and 20 for sequentially delaying the input video signal by 1H, and 1H in the input video signal and 1H delayers 10 and 20, respectively. And a band pass filter 40, 50 and 60 for passing only the 2H delayed video signal band, an output of the band pass filter 40 and 60 and an output of the band pass filter 50 to the inverter 70. Intermediate detector 80 for separating the color signal by adding only the maximum value of the inverted signal and adding the minimum value of the added signal, the color signal of the intermediate body detector 80 and the video signal of the 1H delay unit 10 A delay type luminance color separation circuit comprising a mixer 30 for separating luminance signals by adding. 제1항에 있어서, 중간식 검출기(80)는 입력 비데오 신호와 1H지연기(10)에서 1H지연되고 인버터(70)를 거친 비데오 신호의 최대치만 가산하여 하나의 신호를 얻고 상기 인버터(70)를 거친 비데오 신호와 1H 지연기(10)(20)를 통하여 2H 지연된 비데오 신호의 최대치만 가산하여 또하나의 신호를 얻고 입력 비데오 신호와 1H지연기(10)(20)를 통하여 2H 지연된 비데오 신호의 최대치만 가산하여 또하나의 신호를 얻은후 상기된 3가지 신호중의 최소치만 가산하여 칼라신호로 출력시키게 구성된 지연형 휘도칼라 분리회로.2. The intermediate detector 80 adds only the maximum value of an input video signal and a video signal delayed by 1H in the 1H delayer 10 and passed through the inverter 70 to obtain one signal, thereby obtaining the inverter 70. By adding only the maximum value of the video signal and the 2H delayed video signal through the 1H delayer (10) and (20), another signal is obtained and the 2H delayed video signal through the input video signal and the 1H delayer (10) (20). And adding only the maximum value of to obtain another signal, and then adding only the minimum value of the above three signals to output as a color signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910021820A 1991-11-26 1991-11-26 Delayed Luminance Color Separation Circuit KR930011748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910021820A KR930011748A (en) 1991-11-26 1991-11-26 Delayed Luminance Color Separation Circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910021820A KR930011748A (en) 1991-11-26 1991-11-26 Delayed Luminance Color Separation Circuit

Publications (1)

Publication Number Publication Date
KR930011748A true KR930011748A (en) 1993-06-24

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Application Number Title Priority Date Filing Date
KR1019910021820A KR930011748A (en) 1991-11-26 1991-11-26 Delayed Luminance Color Separation Circuit

Country Status (1)

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KR (1) KR930011748A (en)

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