KR930009418B1 - Phase shifting method of driving voltage in lcd - Google Patents

Phase shifting method of driving voltage in lcd Download PDF

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KR930009418B1
KR930009418B1 KR1019880017529A KR880017529A KR930009418B1 KR 930009418 B1 KR930009418 B1 KR 930009418B1 KR 1019880017529 A KR1019880017529 A KR 1019880017529A KR 880017529 A KR880017529 A KR 880017529A KR 930009418 B1 KR930009418 B1 KR 930009418B1
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signal
lcd
driving voltage
microprocessor
circuit
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KR1019880017529A
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KR900010440A (en
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한동열
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삼성전관 주식회사
김정배
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The method is the phase conversion method of LCD so that the life of LCD module is extended by elimination of dc-component in the LCD driving voltage. The circuit comprises a microprocessor which provides the clock signal (CL1:15.75 KHz) from the microprocessor; a first frequency divider (10a); the second frequency divider (10b) which is input from the clock signal (CL2); an exclusive OR circuit (20) which input by the divided signal (CL1/n) and a phase conversion control signal (M1) from the microprocessor; and a LCD drive circuit which obtains reverse signal (M2) from the exclusive OR circuit.

Description

LCD 구동전압의 위상 변환방법Phase conversion method of LCD driving voltage

제 1 도는 본 발명이 적용되는 회로 블록도.1 is a circuit block diagram to which the present invention is applied.

제 2 도는 본 발명에 의한 출력 파형도.2 is an output waveform diagram according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 주파수 분주회로 10a, 10b : 분주기10: frequency divider circuit 10a, 10b: divider

20 : 배타적 오아게이트20: Exclusive Oagate

본 발명은 LCD(Liquid Crystal Display) 구동전압의 위상 변환 방법에 관한 것으로, 특히 그래픽용으로 사용되는 LCD 구동전압의 직류성분을 제거함으로써 LCD 모듈의 수명을 향상시킬 수 있는 위상 변환 방법에 관한 것이다.The present invention relates to a phase conversion method of a liquid crystal display (LCD) driving voltage, and more particularly, to a phase conversion method that can improve the life of an LCD module by removing a DC component of the LCD driving voltage used for graphics.

종래의 LCD 구동전압은 30Hz 전후의 구형파 직류성분을 가지고 전압을 공급하여 LCD 모듈을 구동시켰다.Conventional LCD driving voltage has a square wave DC component around 30Hz to supply a voltage to drive the LCD module.

그러나 종래의 교류성분 구동 전압에는 직류성분이 존재함으로써 한 화소(Pixel)가 발광된 후에 바로 소멸되어야 하는데 일정한 시간이 경과될 때까지 잔상을 남기게 되어 LCD 모듈의 표시상태가 선명하지 못하였고 또 수명도 저하되는 문제점이 있었다.However, due to the presence of a DC component in the conventional AC component driving voltage, it should be extinguished immediately after one pixel is emitted, leaving an afterimage until a certain time has elapsed. There was a problem of deterioration.

따라서 본 발명은 상기한 문제점을 해결하기 위하여 창안한 것으로써, 본 발명의 목적은 LCD 구동전압을 일정시간 경과후에 위상을 변환시켜 새로운 전압을 인가할 수 있도록 함으로써 LCD 구동전압에 포함되어 있는 직류성분을 완전히 제거할 수 있는 LCD 구동전압의 위상변환방법을 제공하는데 있다.Therefore, the present invention was devised to solve the above problems, and an object of the present invention is to change the phase of the LCD driving voltage after a predetermined time so that a new voltage can be applied to the DC component included in the LCD driving voltage. To provide a phase shift method of the LCD driving voltage that can be removed completely.

상기한 목적을 달성하기 위하여 본 발명은 마이크로프로세서(Micro-Processor)로부터 출력되는 클럭신호(CL)를 LCD 모듈내에에 구성한 주파수 분주회로에 인가시켜서 분주한 분주신호와 마이크로프로세서로부터 출력되는 제어신호(M1)를 배타적 오아게이트에 인가시켜 구동전압의 위상을 변환시키는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a frequency division circuit configured by applying a clock signal CL output from a microprocessor to a frequency division circuit configured in an LCD module and a control signal output from the microprocessor. M 1 ) is applied to an exclusive orifice to convert the phase of the driving voltage.

이하 첨부된 도면에 의하여 본 발명을 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

제 1 도는 본 발명의 회로 블록도로서, 제 1 도에 도시한 바와같이 마이크로프로세서로부터 출력되는 클럭신호(CL1: 15.75KHz)를 주파수 분주회로(10)의 제 1 분주기(10a)에 인가되도록 연결하고 이 제 1 분주기(10a)에 의하여 분주된 클럭신호(CL2)를 제 2 분주기(10b)에 인가되도록 연결하며, 이 제 2 분주기(10b)의 분주신호

Figure kpo00001
와 마이크로프로세서로부터 출력되는 위상변환용 제어신호(M1)를 배타적 오아게이트(20)에 각각 인가되도록 연결하여 배타적 오아게이트(20)에서 위상을 반전해서 반전신호(M2)를 얻어 LCD 구동회로에 출력하도록 접속한 것이다.FIG. 1 is a circuit block diagram of the present invention, and as shown in FIG. 1, a clock signal (CL 1 : 15.75 KHz) output from a microprocessor is applied to the first divider 10a of the frequency divider circuit 10. As shown in FIG. The clock signal CL 2 divided by the first divider 10a to be applied to the second divider 10b, and the divided signal of the second divider 10b.
Figure kpo00001
And the phase conversion control signal M 1 outputted from the microprocessor to be applied to the exclusive oragate 20, respectively, to invert the phase at the exclusive oragate 20 to obtain an inversion signal M 2 . It is connected to output to.

이하, 이들의 동작 및 작용효과를 설명한다.The operation and effect of these will be described below.

제 2a 도에 도시한 바와 같은 클럭 신호(CL1) 파형을 제 1 및 제 2 분주기(10a)(10b)로 구성된 주파수 분주회로(10)에 입력해서 일정한 주기로 분주하면 제 2a 도에 표시한 바와같이

Figure kpo00002
의 분주신호가 출력된다.When the clock signal CL 1 waveform as shown in FIG. 2A is input to the frequency divider circuit 10 composed of the first and second dividers 10a and 10b and divided at regular intervals, the waveform shown in FIG. As
Figure kpo00002
The divided signal of is outputted.

상기 주파수 분주회로(10)에서 출력되는 분주신호

Figure kpo00003
를 제 2b 도에 도시한 변환용 제어신호(M1)와 함께 배타적 오아게이트(20)에 입력해서 상기 분주신호
Figure kpo00004
와 제어신호(M1)가 서로 다른 레벨의 신호일 때 위상을 반전해서 변환하여 LCD 모듈을 구동하는 출력신호(M2)를 얻는다. 구체적으로 설명하면, 상기 설명에 있어서, 배타적 오아게이트(20)에서는 입력되는 제어신호(M1)가 로우레벨의 신호이고, 주파수 분주회로(10)에서 출력되는 분주신호
Figure kpo00005
가 하이레벨일 경우 또는 제어신호(M1)가 하이레벨의 신호이고 주파수 분주회로(10)에서 출력되는 분주신호
Figure kpo00006
가 하이레벨일 경우에는 상기 제어신호(M1)와 분주신호
Figure kpo00007
를 배타적 논리합함과 동시에, 위상을 반전시켜서 직류성분을 제거하여 도시하지 않은 LCD 모듈을 구동하는 신호(M2)를 출력하는 것이다.A frequency division signal output from the frequency division circuit 10
Figure kpo00003
Is inputted to the exclusive oragate 20 together with the conversion control signal M 1 shown in FIG.
Figure kpo00004
When the and control signals M 1 are signals of different levels, the phase is inverted and converted to obtain an output signal M 2 for driving the LCD module. Specifically, in the above description, in the exclusive oragate 20, the control signal M 1 inputted is a low level signal, and the divided signal output from the frequency division circuit 10 is provided.
Figure kpo00005
Is a high level or the control signal M 1 is a high level signal and is divided by the frequency division circuit 10.
Figure kpo00006
Is high level, the control signal M 1 and the divided signal
Figure kpo00007
Is the exclusive OR, and the phase is reversed to remove the DC component to output the signal M 2 for driving the LCD module (not shown).

이상에서 설명한 바와같이 LCD 모듈 구동전압이 주기적으로 위상 반전되어 직류성분을 제거시켜 드라이브단에 출력함으로써 액정의 휘도와 수명이 향상되는 장점이 있는 것이다.As described above, the LCD module driving voltage is periodically phase-inverted to remove the direct current component and output to the drive stage, thereby improving the brightness and life of the liquid crystal.

Claims (1)

LCD 구동전압위 위상변환방법에 있어서, 마이크로프로세서로부터 출력되는 클럭신호(CL1)를 주파수 분주회로(10)에서
Figure kpo00008
로 주파수 분주시켜서
Figure kpo00009
분주신호를 얻고, 상기 분주신호
Figure kpo00010
를 마이크로프로세서로부터 출력되는 제어신호(M1)와 함께 배타적으로 오아게이트(20)에 입력해서 상기 분주신호
Figure kpo00011
와 제어신호(M1)가 서로 다른 레벨의 신호일 때 위상을 변환하는 것을 특징으로 하는 LCD구동전압의 위상 변환방법.In the phase shift method of the LCD driving voltage, the clock signal CL 1 output from the microprocessor is transferred to the frequency division circuit 10.
Figure kpo00008
Frequency division by
Figure kpo00009
Obtaining the division signal, the division signal
Figure kpo00010
Is inputted exclusively to the oragate 20 together with the control signal M 1 output from the microprocessor to divide the divided signal.
Figure kpo00011
And phase shift when the control signal (M 1 ) and the signal of different levels are different.
KR1019880017529A 1988-12-26 1988-12-26 Phase shifting method of driving voltage in lcd KR930009418B1 (en)

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JP2001109437A (en) * 1999-10-12 2001-04-20 Fujitsu Ltd Driving circuit for liquid crystal panel and liquid crystal control signal generating circuit and liquid crystal display device provided with them and control method for the same device

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