KR930008530B1 - Structure for ccd image sensor - Google Patents

Abstract

The structure is characterized by including (i) diamond shape photodiodes diagonally arraged at regular intervals, (ii) VCCD regions for vertically transmitting photo-charges generated from the photodiodes, (iii) HCCD regions for horizontally transmitting photo-charges transmitted from VCCD regions, (iv) channel stop layers formed for segregating VCCD regions and photodiodes, and (iv) a sensing amplifier for sensing the photo-charges transmitted from HCCD regions.

Description

CCD image sensor structure

1 is a state diagram of a conventional CCD image sensor arrangement.

2 is a cross-sectional view of a conventional CCD image sensor.

3 is a state diagram of a CCD image sensor arrangement according to the present invention.

4 is a cross-sectional view of a CCD image sensor according to the present invention.

5 is an arrangement diagram of polygates in a CCD image sensor according to the present invention.

6 is a driving pulse timing diagram and a potential contour diagram according to the present invention.

* Explanation of symbols for main parts of the drawings

10 ~ 10n: Photodiode 1: TG

2: VCCD 3: HCCD

4: sensing amplifier 5: output

6: Channel stop 7: Substrate

8a, 8b, 8c: recall

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD image sensor, and more particularly, to a CCD image sensor structure in which photodiodes are arranged in a diamond form so as to increase an amount of signal charge and resolution of a pixel.

The conventional image sensor comprises a plurality of photodiodes 10 to 10n in which photoelectric conversion is caused by light energy entered as a first diagram, and a vertical CCD region for vertical / horizontal charge transfer. And VCCD (2) and HCCD (3), which are horizontal charge transfer (Horizontal CCD) areas, a sensing amplifier (4) for transmitting signals to the outside of the chip, and charges from the photodiode to the vertical VCCD (2). It consists of the transfer gate (TG) 1 which moves.

FIG. 2 is a cross-sectional view of the above structure in which the light hV incident on the photodiode 10 causes photoelectric change to generate charge.

에 가해지는 충분한 크기의 클럭(〉0)에 의하여 TB(1) 하측에 N채널이 형성되며 이 채널을 통하여 전하는 N-의 VCCD(2)영역으로 드레인된다.The charge at this time is stored in the photodiode for an arbitrary integration time.

An N-channel is formed below TB (1) by a clock (> 0) of a sufficient magnitude, and charge is drained to the N- VCCD (2) region through this channel.

에 가해지는 클럭신호에 의해서 전하전송현상으로 제 1 도의 HCCD(3)로 옮겨지게 되며, HCCD(3)에서도 전하전송에 의하여 센싱엠프(4)로 전달된 후 칩의 외부(5)로 전달된다.Later on from VCCD (2)

It is transferred to the HCCD 3 of FIG. 1 by the charge transfer phenomenon by the clock signal applied thereto, and is also transferred to the sensing amplifier 4 by the charge transfer in the HCCD 3 and then to the outside 5 of the chip. .

However, in such a conventional technology configuration, there is a limit in increasing the magnitude of the signal charge and a limit in increasing the horizontal / vertical resolution.

That is, one photodiode constitutes one pixel, and the amount of signal charge that can be different is determined by the structure of the photodiode. The prior art configuration has a limitation and is determined by the area of the channel stop 6 of the VCCD 2 that is horizontal / vertical resolution, but this also has a limitation.

Accordingly, an object of the present invention is to overcome the above-mentioned limitations and to improve the resolution and the amount of signal charge that a pixel can have by arranging the photodiodes in diamond form.

When explaining the present invention for achieving the above object with reference to the accompanying drawings as follows.

3 is an arrangement state diagram of a CCD image sensor according to the present invention, and FIG. 4 is a structure cross-sectional view of a CCD image sensor according to the present invention, and FIG. 5 is an arrangement state diagram of a polygate in a CCD image sensor according to the present invention. Sensor arrays A plurality of photodiodes 10-10n photoelectrically changed by arranging each photodiode in a rhombus shape at regular intervals as shown in FIGS. 3 and 4 in the up, down, left, and right directions, and in the vertical direction A plurality of VCCD (2) areas formed in a zigzag form between the photodiodes and for vertically transferring the photocharges generated by the photodiodes (10-10n) at regular intervals, and each VCCD (2) An HCCD (3) region for transmitting the photocharges transmitted from the region in a horizontal direction, a channel stop layer (6) for isolating one of the photodiode regions of the VCCD (2) region and both photodiode regions, and an HCCD ( 3) Area Photoelectric charges transmitted by the sensing amplifier 4 for sensing and outputting are formed.

Here, the first polygate poly ₁ to simultaneously transfer three neighboring photodiodes 10, 11, and 12 as a transfer gate, as shown in FIG. 5, for a polygate for transferring charge in the VCCD region 2. Is formed, and a second poly gate poly ₂ for transferring charge between the first poly gates poly ₁ is formed on the VCCD region.

는 홀수번째 열(기수필드)의 제 1 폴리게이트(poly₁)에는 제 1 클럭신호

기 짝수번째 열(우수필드)의 제 1 폴리케이트(poly₁)에는 제 3 클럭신호

가 인가되고, 홀수번째 열의 제 2 폴리게이트(poly₂)에는 제 2 클럭신호

, 짝수번째열의 제 2 폴리게이트(poly₂)에는 제 4 클럭신호

가 인가되도록 구성되며, 한개의 제 1 폴리게이트(poly₁)에 의해 트랜스퍼되는 3개의 광다이오드(10, 11, 12)가 한 회소(8a, 8b)를 형성하는데 한 회소를 이루는 3개의 광다이오드(10, 11, 12)즉 양측의 광다이오드(10, 12)는 이웃하는 제 1 폴리게이트에도 트랜지스퍼되도록 되어있다.As described above, the first polygate poly ₁ and the second poly gate poly ₂ are repeatedly formed along the zigzag-shaped VCCD 2 region, and the vertical transmission clock signal

Denotes a first clock signal in a first poly gate poly ₁ of an odd-numbered column (odd field).

The third clock signal is included in the _first polycate (poly ₁ ) of the even-numbered column (excellent field).

Is applied, and a second clock signal is applied to the second poly gate poly _{2 of} the odd-numbered column.

And a fourth clock signal in the _second polygate poly _{2 of} even-numbered columns.

Is configured to be applied, and the three photodiodes, three photodiodes 10, 11 and 12, which are transferred by _{one first} polygate poly ₁ , form one element 8a, 8b. (10, 11, 12) That is, the photodiodes 10, 12 on both sides are also made to be transistors in the neighboring first polygates.

That is, the diode 11 of the three photodiodes 10, 11, 12 constituting one pixel is to be transferred only by the third clock signal, and the photodiodes 10, 12 on both sides have a third clock signal (excellent field). And the first clock signal (odd field) can be transferred so that the vertical resolution can be doubled.

The operation of the CCD image sensor of the present invention configured as described above is as follows.

가 인가되는데, 제 1 , 제 3 클럭신호

의 하이전압(V₁, V₂)일때 한 회소(8a)를 이루는 광다이오드에서 VCCD(2)영역으로 광전하기 트랜스퍼되고 제 6b 도는 제 6a 도의 K부분 확대도로써, 클럭신호에 의해 VCCD(2) 영역에서 수평전하전송영역인 HCCD(3)영역쪽으로 제 6c 도와 같이 전송된다.6 is a driving pulse signal timing and potential contour diagram of the present invention.

Is applied to the first and third clock signals.

When the high voltages of V ₁ and V _{2 are at} , the photodiode is transferred to the VCCD 2 region from the photodiode constituting one element 8a, and FIG. 6b is an enlarged view of the portion K of FIG. 6a, and is driven by the clock signal. ) Is transferred to the HCCD (3) area, which is a horizontal charge transfer area, as shown in FIG. 6C.

The signal transmitted from the VCCD 2 area to the HCCD 3 area is output by the sensing amplifier 4 as in the prior art.

As described above, the CCD image sensor according to the present invention increases the dynamic range by three times the amount of signal charge that one pixel can have and increases the dynamic range and alternately uses the field cycles when reading adjacent photodiode signals. You get twice the vertical resolution of the method.

Claims (3)

A plurality of photodiodes 10-10n for photoelectric conversion by arranging each of the photodiodes in a rhombus shape having a predetermined interval in the up, down, left and right diagonal directions, and a constant between the photodiodes 10-10n in the vertical direction A plurality of VCCD (2) areas for vertically transferring the photocharges generated in the photodiode (10-10n) and formed in a zigzag form at intervals, and the photocharges transmitted from each VCCD (2) area is horizontal Sensing the HCCD (3) region for transmission in the direction, the channel stop layer (6) formed to isolate the VCCD (2) region from the one side photodiode region, and the photocharges transmitted from the HCCD (3) region CCD image sensor structure characterized in that it comprises a sensing amplifier (4) for outputting. The CCD image sensor structure according to claim 1, wherein the transfer polygate in the VCCD (2) region is formed so as to simultaneously transfer from three photodiodes forming one pixel. 3. The CCD image sensor structure according to claim 2, wherein two of the two photodiodes of the three photodiodes for forming one pixel are configured to transfer photocharges alternately in odd and even fields.

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