KR930005347B1 - The transfer apparatus for function of maintenance - Google Patents

Abstract

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Description

System of systematic maintenance function

1 is a block diagram of a delivery device of a systematic maintenance function according to the present invention.

2 is a configuration diagram of a seat shift converter for feedback control used in the present invention.

3 is a timing diagram showing a time transition state of FIG.

* Explanation of symbols for main parts of the drawings

10 to 50: seat shift converter 60 for feedback control: multiplexer

70: decoders A1 to An: and gate

B1 to Bn: Input buffer L1 to Ln: D flip-flop

NA: NAND gate SB1 to SBn: Feedback control buffer

SR: Parallel / Serial Shift Converter

The present invention relates to a device for detecting a large amount of errors for each function that can occur during a space-partition exchange in an electronic switchboard and transmitting a systematic error generation to a control device.

The reference systems are not provided with a means of notifying the controller of their error, so the control must periodically scan the appropriate space splitting switch to see if an error has occurred. This results in an increase in load of the control device, which is inefficient in the switching control which is the original purpose of the control device and the space divider switch.

In order to eliminate such closure, the present invention monitors the status of maintenance functions for each function in the switch, and provides a status alarm to determine the overall status of each function, and notifies the control device when an error occurs in at least one group among the states. The purpose of the present invention is to provide a device for delivering a systematic maintenance function for detecting an error state of a space division switch.

In order to achieve the above object, the present invention provides a device for detecting and transmitting a large amount of errors for various functions generated during a space division exchange in an all-electronic exchange to a control device. A second position control conversion means for outputting group state information and a group state alarm connected to a state information output terminal and a clock end of each of the first position control conversion means for the first feedback control and the position movement conversion means for the first feedback control; The multiplexing means connected to the information data output terminal of each of the first position shift conversion means for input feedback and inputting group loading as a selection stage to select input data and outputting the selected data; Selecting the movement and loading of the seat movement change means for the first feedback control according to the input state It characterized by configuring the decoding means.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing an embodiment of a system for delivering a systematic maintenance function according to the present invention, in which 10 to 50 are seat shift converters for a feedback seat, 60 is a multiplexer, and 70 is a decoder.

) 및 클럭단에 입력단이 연결되고 출력단을 통해 그룹상태 정보 및 그룹상태 경보를 출력하는 디지탈 비트정보 궤환제어용 자리이동 변환기(50)와, 상기 궤환제어용 자리이동 변환기(10∼40) 각각의 정보 데이터 출력단(Do)에 연결되어 있고 그룹로딩을 선택단(S0-S2)으로 입력하여 입력데이터를 선택하고 정보 데이터를 출력하는 멀티플렉서(60)와, 선택단(S0∼S2)의 입력에 따라 상기 자리이동 변환기(10∼40)중 해당되는 것의 이동 및 로딩(S/L)을 선택하는 디코더(70)로 구성한다. 본 발명의 바람직한 실시예에서 상기의 멀티플렉서(60)은 그룹 로딩의 3비트를 선택단(S0∼S2)을 통해 입력하여 입력단의 8입력 중 어느 하나를 선택하여 출력시키는 8×1 멀티플렉서를 사용하였으며, 상기의 디코더(70)은 출력인에이블 단자(

)에 논리값 “0”이 입력되는 기간 동안 그룹 로딩의 3비트가 선택된 (S0∼S2)으로 입력되는 상태(2진수)에 따라 8개의 출력단중 어느 하나를 선택하여 논리값 “0”을 출력시키는 인에이블 단자를 갖는 3×8디코더를 사용하였다.As shown in the figure, the present invention provides digital bit information feedback control seat shift converters 10 through 8, in which input terminals are connected to respective groups (groups 1 to 8) and clock terminals (clocks 1 and 2) for detecting error bits. 40 and the alarm output stage of each of the feedback control seat-use converters 10 to 40 (

Information data of the digital bit information feedback control seat shift converter 50 and the feedback control seat shift converter 10 to 40 connected to an input terminal and a clock stage and outputting group status information and a group status alarm through an output terminal. The multiplexer 60 is connected to an output terminal Do and inputs group loading to a selection terminal S0-S2 to select input data and output information data, and the digit according to the input of the selection terminals S0 to S2. The decoder 70 selects the moving and loading (S / L) of the corresponding ones of the moving converters 10-40. In the preferred embodiment of the present invention, the multiplexer 60 uses an 8 × 1 multiplexer which selects and outputs any one of eight inputs of the input terminal by inputting 3 bits of group loading through the selection terminals S0 to S2. The decoder 70 has an output enable terminal (

In the period during which the logic value "0" is input to the controller, one of the eight outputs is selected and the logic value "0" is output according to the state (binary) in which 3 bits of group loading are input (S0 to S2). A 3x8 decoder with enable terminals was used.

It is connected to the selection stages S0, S1, S2 of the 3-bit 3x8 decoder of group loading, and to the selection stages S0, S1, S2 of the 8x1 multiplexer. The loading selection is connected to the output enable terminal of the 3x8 decoder to limit the pulse width of the logic value "0" of the loading signal input to the selection control S / L and the movement of the feedback shift seat converter. The state loading is connected to the movement and selection stage S / L of the feedback control seat shift converter 50, the clock 1 is connected to the CP1 of the feedback control seat shift converter 10 to 50, and the clock 2 is the seat shift for each feedback control. Connect to the CP2 of the converter.

)가 즉시 출력되어 궤환제어용 자리이동 변환기(50)의 해당 입력단으로 그룹상태 경보

로 직접 출력시켜 64개의 오류 비트 검출 입력단중 적어도 한 개 이상의 입력단에서 오류 비트가 검출되고 있음을 지시해준다. 이때 제어장치(도시되지 않았음)에서는 상기 그룹상태경보(

)를 보고 어느 그룹 혹은 몇번째 그룹에서 오류 비트가 검출되었는지를 파악하기 위하여 상태로딩에 논리값 “0”를 입력시켜 그룹상태정보(Do)를 읽어낸다. 그룹 상태정보 8비트중 “1”번 비트에서 논리값 “0”가 검출되었을 경우, 그룹 로딩에 2진수 “0”를 입력하고 로딩선택에 논리값 “0”를 입력시키면 궤환제어용 자리이동 변환기(10)의 로딩 및 이동 S/L단에 논리값 “0”가 디코더(70)의 출력단 1로부터 입력된다. 여기서 궤환제어용 자리이동 변환기(10)의 내부에서 계속적으로 궤환되고 있는 정보 데이터(Do)를 직렬 데이터 형태로 출력되면 8×1 멀티플렉서(60)의 입력단 1에서 출력으로 연결된 통로를 거쳐 최종 정보 데이터를 얻어낸다. 최종 출력된 정보 데이터를 읽어보면 그룹 1의 어느 입력단으로 오류 비트가 검출되었는지 오류 발생 위치까지 정확히 찾을 수 있는 장치이다. 따라서 우선적으로 그룹상태정보(

)를 읽어낸 후에, 논리값 “0”가 검출되면 그룹상태정보를 읽어서 각 그룹의 상태를 파악할 수 있고, 특정 그룹에서 논리값 “0”비트가 검출되면 해당 그룹의 정보데이터를 읽어내어 오류 비트의 검출 위치를 정확히 알아낼 수 있도록 한 체계적인 유지보수 기능의 전달장치이다.The first feedback control seat-use converter 10 accepts eight kinds of error bits in group 1, the second feedback control seat-shift converter 20 is in group 2, and the third feedback control seat-shift converter 30 is in group 3, … The eighth feedback control seat shift converter 40 receives eight types of error bits in each group 8, so that 64 types of error bits can be detected. If there is an error bit coming into any of the inputs in the groups, the status alarm (

) Is immediately output and the group status alarm is sent to the corresponding input of the seat shift converter 50 for feedback control.

It outputs directly to the to indicate that the error bit is detected in at least one of the 64 error bit detection input. At this time, the control device (not shown) in the group status alarm (

) And read the group status information (Do) by inputting the logic value “0” into status loading to find out which group or which group the error bit was detected. If logical value "0" is detected in bit 1 of group status information, input binary "0" for group loading and logical value "0" for loading selection. The logic value "0" is input from the output stage 1 of the decoder 70 to the loading and moving S / L stage of 10). Here, if the information data Do continuously being fed back in the feedback control seat shift converter 10 in the form of serial data, the final information data is passed through the passage connected to the output at the input terminal 1 of the 8x1 multiplexer 60. Get it. When reading the final outputted information data, it is a device that can find exactly where the error bit is detected at the input position of group 1 to the error occurrence position. Therefore, the group status information (

After reading), if logical value “0” is detected, the status of each group can be checked by reading group status information. If logical value “0” bit is detected in a specific group, information data of the corresponding group is read and error bit is read. It is a transmission device of systematic maintenance function that can pinpoint the detection position of the system.

2 is a configuration diagram of a position shift converter for feedback control of digital bit information used in the present invention, wherein B1 to Bn are input buffers, SB1 to SBn are feedback control buffers, and A1 to An and gates, and L1. Ln, Ln + 1, and Ln + 2 denote D-type flip-flops, NA denotes a NAND gate, and SR denotes a parallel / serial shift converter, respectively.

As shown in the drawings, the seat shift converter for feedback control according to the present invention includes a D-type flip-flop (Ln + 1) connected to a clock CP2 and a moving and loading selection signal terminal S / L, and each of the input terminals IN1 to IN. A plurality of input buffers B1 to Bn allocated to INn to receive error bits, and a plurality of AND gates A1 to An connected to the output terminal of the input buffer, respectively, and the AND gate output terminal and the clock CP1, respectively. An input terminal is connected to an output terminal of each of the plurality of D-type flip-flops L1 to L2 and the D-type flip-flops L1 to Ln, and a control terminal is connected to the D-type flip-flop Ln + 1. A plurality of feedback control buffers SB1 to SBn connected to the AND gates A1 to An, a NAND gate connected to each output terminal of the AND gates A1 to An, and the D-type flip-flops L1 to Ln. Parallel / serial seats connected to each output stage and the moving and loading selection signal stage (S / L) and clock stage (CP2) And a D-type flip-flop (Ln + 2) connected to the NCR gate output terminal and the clock terminal CP1.

3 is a timing diagram showing the time transition state of FIG. The operation of the seat shift converter for feedback control of FIG. 2 will be described as follows.

)을 통해 오류 검출지시 비트로서 상태정보를 출력시킨다. 한편, 앤드게이트(An)의 출력 신호인 논리값 “0”는 D형 플립플롭(Ln)을 거쳐 궤환제어용 버퍼(SBn)을 통하여 다시 앤드게이트(An)의 타측 입력단으로 궤환되어 계속적으로 오류 비트에 해당하는 논리값 “0”가 유지된다.As shown in FIG. 3, when a logic value of “0” is input to the input INn, it is input to one side of the AND gate An through the input buffer Bn of FIG. 2, and to the other input of the AND gate An. Irrespective of the output, it is output as logical value "0". The output value of the AND gate is input to one input terminal of the NAND gate NA, and simultaneously to the input terminal D of the D flip-flop Ln. At this time, the output of NAND gate NA is output as “1” by logic value “0” which is output signal of AND gate regardless of the other input signal, so that it is connected to D-type flip-flop (Ln + 2). After input, the output terminal (

), Status information is output as an error detection instruction bit. On the other hand, the logic value "0" which is the output signal of the AND gate An is fed back to the other input terminal of the AND gate An via the feedback control buffer SBn via the D-type flip-flop Ln, and continuously error bits The logical value corresponding to "0" is maintained.

)의 출력으로서 논리값 “1”이 출력되어 궤환제어용 버퍼(SB1, SB2, …SBn)의 출력을 차단하여 앤드게이트(A1, A2 …An)의 출력으로는 모두 논리값 “1”이 나타나며, 동시에 병렬/직렬 자리이동 변환기(SR)의 입력 1, 2, …n으로 입력되는 신호들을 로딩하여 어느 입력단(In1, In2, …INn)으로 오류 신호가 입력되었는지를 클럭 CP2에 의하여 순차적으로 n비트의 직렬 데이터(Do)를 정보 데이터로 출력시킨다.As shown in FIG. 3, when the logic value “0” is input to the input IN1 as the error bit, the feedback control buffer SB1 through the D-type flip-flop L1 through the AND gate A1 through the input buffer B1 of FIG. After returning to), if the logic value “0” is inputted to the moving and loading selection input terminal (S / L input terminal) after the continuous feedback to the other input of the AND gate A1, the D-type flip-flop (Ln + 1) Output stage

Outputs a logic value "1", cuts off the output of the feedback control buffers SB1, SB2, ... SBn, and a logic value of "1" appears as an output of the AND gates A1, A2 ... An. At the same time, inputs 1, 2,... Of the parallel / serial shift converter (SR). The signals input to n are loaded to sequentially output n bits of serial data Do as information data by clock CP2 to which input terminal In1, In2, ... INn.

Therefore, in the electronic switchboard such as TDK-10 (registered trademark) and the like, errors of each function that may occur during the space division switching process are detected and transmitted to the control device, which shifts the seat for feedback control of the large-capacity digital bit information. The converter is divided into 8 groups by using a transducer to detect errors of each function, and when at least one error is detected, group status information is generated to read the information data from the control device to determine in which group the error is detected. It allows you to know in detail how many inputs are detected at the input.

As described above, the present invention provides a digital communication system and a digital measuring device with a maintenance function or a self-diagnosis function, and has an effect of improving the reliability of the system.

Claims (4)

An apparatus for detecting a large amount of errors for various functions generated during a space division exchange in an electronic switching system and transmitting the same to a control device; First feedback control seat shift converters 10 to 40 connected to respective groups (groups 1 to 8) and clock stages (clocks 1 and 2) for detecting an error bit, and the seat shift conversion means for the first feedback control. (10 to 40), the second feedback control shifts transformation means 50 to output the status of each of the alarm output terminal (F) and is connected to the clock stage group condition information (Do), and group state diameter (F), said first It is connected to the information data output terminal Do of each of the position shift converting means 10 to 40 for feedback control, and inputs group loading to the selection terminals S0 to S2 to select input data, and outputs the selected data. Inputting the multiplexing means 60 and group loading into the selection stages S0 to S2 to select the movement and loading (S / L) of the first feedback control seat movement converting means 10 to 40 according to the input state. All of the systematic maintenance functions characterized by consisting of the decoding means 70 Device. The seat shift converter (10 to 40) according to claim 1, wherein the first shift control seat shift converting means (10 to 40) is a feedback shift seat (10 to 40) for digital bit information in each of eight groups formed by grouping eight types of error bits into one group. A system for delivering a systematic maintenance function, wherein 64 types of error bits are detected by allocating and configuring 40). The method according to claim 1, wherein in order to determine the correct error bit detection position, the decoding means (70) inputs a binary number of the sequence value in which the logical value "0" bit among the 8 bits of group state information is located as a group loading 3 bits Enable terminal (

) Is a 3 × 8 decoder that inputs the load selection logic value “0” to identify the error bit detection position of the group. 3. The feedback control seat shift converters 10 to 40 and the second feedback control seat shift converters constituting the first feedback control seat shift converter are shifted with a clock CP2. And a first type flip-flop (Ln + 1) connected to the load selection signal terminal (S / L), an input buffer group (B1 to Bn) assigned to each of the input terminals (IN1 to INn) to receive an error bit, and the input. And gate groups A1 to An connected to the output terminals of the buffer group, a plurality of D flip-flop groups L1 to L2 connected to the AND gate output terminal and the clock CP1, respectively, and the D flip-flop group L1. A feedback control buffer group SB1 to SBn connected to an output terminal of each of the output terminals, a control terminal connected to the first type flop flop Ln + 1, and an output terminal connected to the end gate groups A1 to An, respectively. ), A NAND gate NA connected to each output terminal of the AND gate groups A1 to An, and the D-type flip-flop groups L1 to L a parallel / serial shift converter SR connected to each output terminal of the n), a moving and loading selection signal terminal S / L, and a clock terminal CP2, and the NAND gate NA output terminal and a clock terminal CP1. A device for delivering a systematic maintenance function, comprising a connected 2D flip-flop (Ln + 2).

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