KR930004830Y1 - Sync-signal detecting control circuit - Google Patents

Sync-signal detecting control circuit Download PDF

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Publication number
KR930004830Y1
KR930004830Y1 KR2019880001765U KR880001765U KR930004830Y1 KR 930004830 Y1 KR930004830 Y1 KR 930004830Y1 KR 2019880001765 U KR2019880001765 U KR 2019880001765U KR 880001765 U KR880001765 U KR 880001765U KR 930004830 Y1 KR930004830 Y1 KR 930004830Y1
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South Korea
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signal
output
synchronization signal
transistor
control circuit
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KR2019880001765U
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Korean (ko)
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KR890018361U (en
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김재신
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주식회사 금성사
최근선
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/44—Colour synchronisation

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음.No content.

Description

동기신호 검출자동 조절회로Synchronization signal detection automatic control circuit

제1도는 종래의 회로도.1 is a conventional circuit diagram.

제2도는 본 고안의 동기신호 검출자동 조절회로도.2 is a synchronization signal detection automatic control circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 버퍼단 11 : 동기신호 검출부10: buffer stage 11: synchronization signal detector

12 : 공진회로 13 : 평활회로12 resonant circuit 13 smoothing circuit

14 : 동기신호 조절 스위칭부 TR1-TR3: 트랜지스터14: synchronization signal control switching unit TR 1- TR 3 : transistor

R1-R14: 저항 C2-C6: 콘덴서R 1 -R 14 : Resistor C 2 -C 6 : Capacitor

L1: 코일 D1: 다이오드L 1 : coil D 1 : diode

본 고안은 동기신호 검출자동 조절회로에 관한 것으로, 특히 영상신호의 동기신호의 레벨을 검출한 후 그 동기신호의 레벨이 일정치 이하일 경우에는 동기신호의 레벨을 일정치로 조절하여 화면의 왜곡현상을 방지할수 있도록한 동기신호 검출자동 조절회로에 관한 것이다.The present invention relates to a synchronization signal detection automatic control circuit. Especially, after detecting the level of the synchronization signal of the video signal, if the level of the synchronization signal is below a certain value, the level of the synchronization signal is adjusted to a constant value, causing distortion of the screen. It relates to a synchronization signal detection automatic control circuit that can be prevented.

종래의 회로도는 제1도에 도시한 바와 같이 콘덴서(C1)를 통한 칼라신호(CS)와, 휘도신호(YS)가 Y/C 혼합부(1)에서 혼합되어 외부와의 임피던스 매칭을 위한 영상신호 출력버퍼(2)를 통해 영상신호로 출력되게 구성되었으나, 이는 영상신호 녹화 및 재생시 테이프 또는 기기의 결함으로 인하여 동기신호의 레벨이 일정치 이하가 되었을 경우에는 화면이 찌그러지는 등의 왜곡현상이 발생됨은 물론 화면이 흔들리게 되는 등의 결함이 있었다.In the conventional circuit diagram, as shown in FIG. 1 , the color signal CS through the capacitor C 1 and the luminance signal YS are mixed in the Y / C mixing unit 1 to perform impedance matching with the outside. It is configured to be output as a video signal through the video signal output buffer (2), but this is when the level of the synchronization signal is below a certain value due to a defect in the tape or equipment during recording and playback of the video signal distortion such as distortion of the screen Not only did the phenomenon occur, but the screen was shaken and there were defects.

본 고안은 이와 같은 종래의 결함을 감안하여 영상신호의 동기신호의 레벨을 검출한 후 그 검출된 결과에 따라 동기신호의 레벨을 일정하게 조절할 수 있도록 안출한 것으로 이를 첨부한 도면에 의하여 상세히 설명하면 다음과 같다.The present invention has been made to detect the level of the synchronization signal of the video signal in consideration of such a conventional defect, and to devise a constant adjustment of the level of the synchronization signal according to the detected result will be described in detail with reference to the accompanying drawings As follows.

제2도는 본 고안의 동기신호검출 자동조절회로도로서, 이에 도시한 바와 같이 입력되는 칼라신호(CS) 및 휘도신호(YS)가 Y/C 혼합부(1)를 통해 혼합된 후 영상신호 출력버퍼(2)를 통해 출력단자(OUT)로 영상신호가 출력되게 한 것에 있어서, 상기 영상신호 출력버퍼(2)의 출력측을 콘덴서(C2)를 통해 저항(R1)(R2) 및 에미터가 저항(R2)에 접속된 트랜지스터(TR1)의 베이스에 접속하여 버퍼단(10)을 구성하고, 그 버퍼단(10)의 출력측 트랜지스터(TR1)의 에미터는 콘덴서(C3) 및 다이오드(D1)를 통한후 저항(R4) 및 콘덴서(C4)을 통해 저항(R5)(R6) 및 에미터가 저항(R7)에 접속된 트랜지스터(TR2)의 베이스에 접속하여 동기신호 검출부(11)를 구성하며, 그 동기신호 검출부(11)의 출력측 트랜지스터(TR2)의 에미터는 콘덴서(C5) 및 접지코일(L1)로 된 공진회로(12)를 통하고, 다이오드(D2) 및 접지콘덴서(C6) 접지저항(R7)으로된 평활회로(13)를 통한후 저항(R9)을 통해 저항(R10)(R11) 및 에미터가 저항(R12)을 통해 동기신호 입력단자(SSI)에 접속된 트랜지스터(TR3)의 베이스에 접속하여 동시신호 조절스위칭부(14)로 구성하고, 그 동기신호 조절스위칭부(14)의 출력측 트랜지스터(TR3)의 콜렉터는 저항(R14)을 통해 상기 칼라신호(CS)와 함께 Y/C 혼합부(1)에 궤환접속하여 구성한 것으로 미설명 부호 Vcc는 전원단자이다.FIG. 2 is a schematic diagram of automatic synchronization signal detection according to the present invention. As shown therein, a color signal CS and a luminance signal YS are mixed through the Y / C mixing unit 1 and then an image signal output buffer. In (2), the video signal is output to the output terminal (OUT), wherein the output side of the video signal output buffer (2) through the capacitor (C 2 ) resistors (R 1 ) (R 2 ) and emitter Is connected to the base of the transistor TR 1 connected to the resistor R 2 to form the buffer stage 10, and the emitter of the transistor TR 1 on the output side of the buffer stage 10 includes a capacitor C 3 and a diode ( After D 1 ), through resistor R 4 and capacitor C 4 , resistors R 5 (R 6 ) and emitter are connected to the base of transistor TR 2 connected to resistor R 7 . And a emitter of the output transistor TR 2 of the sync signal detector 11, the resonant circuit 12 comprising a capacitor C 5 and a ground coil L 1 . Through the smoothing circuit 13 with diode (D 2 ) and ground capacitor (C 6 ) grounding resistor (R 7 ), and then through resistor (R 9 ), resistor (R 10 ) (R 11 ) and The emitter is connected to the base of the transistor TR 3 connected to the synchronization signal input terminal SSI through the resistor R 12 , and constitutes a simultaneous signal adjustment switching unit 14, and the synchronization signal adjustment switching unit 14. The collector of the transistor TR 3 on the output side of the circuit) is configured by feedback connection to the Y / C mixing section 1 together with the color signal CS through the resistor R 14. Reference numeral Vcc denotes a power supply terminal.

이와같이 구성된 본 고안의 작용효과를 상세히 설명하면 다음과 같다.Referring to the effects of the present invention configured in this way in detail as follows.

전원단자(Vcc)에 전원이 인가되고, 동기신호 입력단자(SSI)에 동기신호가 입력되는 상태에서 칼라신호(CS) 및 휘도신호(YS)가 입력되면, 그 입력된 신호(CS)(YS)는 혼합부(1)에서 혼합된 후 영상신호 출력버퍼(2)를 통해 출력단자(OUT)에 출력되는 한편, 이때 그 출력되는 영상신호는 다시 버퍼단(10)의 콘덴서(C2)를 통해 직류전압이 제거된후 저항(R1)(R2)에 의해 분할된 바이어스전압과 트랜지스터(TR1)의 베이스에 인가되므로 직류전압이 제거된 영상신호는 트랜지스터(TR1)에 의해 증폭되어 그의 에미터에 출력되고, 그 출력된 신호는 동기신호 검출부(11)의 콘덴서(C3) 및 다이오드(D1)를 통해 클램핑된 후 저항(R4) 및 콘덴서(C4)를 다시 통해 적분되므로 고주파 성분인 칼라신호는 제거되어 트랜지스터(TR2)의 베이스에 인가되므로 저항(R5)(R6)(R7)의 값을 조정함으로써 트랜지스터(TR2)의 에미터에는 적정레벨의 동기신호가 출력되고, 그 출력된 동기신호는 공진회로(12)를 통해 동기신호이외의 잡음신호는 제거된 후 평활회로(13)를 통해 평활되어 동기신호조절 스위칭부(14)의 저항(R19)을 통한 후 트랜지스터(TR3)의 베이스에 인가되므로 트랜지스터(TR3)는 그의 베이스에 인가된 바이어스 전압에 따라 온, 오프 즉, 트랜지스터(TR3)가 온될 경우에는 동기신호 입력단자(SSI)에 입력되는 동기신호가 저항(R12) 및 트랜지스터(TR3), 저항(R13)(R14)을 통해 입력되는 칼라신호(CS)와 함께 Y/C 혼합부(1)에 다시 입력되어 상기와 같이 동기신호를 검출하여 그에 따른 동기신호의 레벨을 조정할 수 있게된다.When power is applied to the power supply terminal Vcc and the color signal CS and the luminance signal YS are input while the synchronization signal is input to the synchronization signal input terminal SSI, the input signal CS (YS) ) Is mixed in the mixing unit 1 and then output to the output terminal (OUT) through the image signal output buffer (2), while the output image signal is again through the capacitor (C 2 ) of the buffer stage 10 After the DC voltage is removed, the bias voltage divided by the resistors R 1 and R 2 is applied to the base of the transistor TR 1 , and thus the image signal from which the DC voltage is removed is amplified by the transistor TR 1 . Output to the emitter, and the output signal is clamped through the capacitor C 3 and the diode D 1 of the synchronization signal detector 11 and then integrated through the resistor R 4 and the capacitor C 4 again. Since the color signal, which is a high frequency component, is removed and applied to the base of the transistor TR 2 , the value of the resistors R 5 , R 6 , and R 7 By adjusting, the synchronous signal of an appropriate level is output to the emitter of the transistor TR 2 , and the output synchronous signal is removed through the resonant circuit 12 to remove noise signals other than the synchronous signal, and then the smoothing circuit 13 is removed. The transistor TR 3 is smoothed through the resistor R 19 of the synchronous signal control switching unit 14 and then applied to the base of the transistor TR 3 according to the bias voltage applied to the base thereof. When the transistor TR 3 is turned on, the synchronization signal inputted to the synchronization signal input terminal SSI is a color signal inputted through the resistor R 12 , the transistor TR 3 , and the resistor R 13 , R 14 . It is input again to the Y / C mixing unit 1 together with CS) to detect the synchronization signal as described above and adjust the level of the synchronization signal accordingly.

이상에서 설명한 바와 같이 출력되는 영상신호의 동기신호를 검출한 후 그 검출결과에 따라 동기신호의 레벨을 조절하게 함으로써 녹화 및 재생시 테이프 및 세트의 결함으로 인한 동기신호의 레벨이 일정치 이하일 경우에 발생되는 화면이 찌그러지는 등의 왜곡 현상 및 화면의 흔들리는 현상을 방지할 수 있게되어 시청자에게 보다 더 쾌적한 화면을 제공할 수 있음은 물론 제품에 대한 신뢰성이 향상되는 효과가 있다.As described above, after detecting the synchronization signal of the output video signal and adjusting the level of the synchronization signal according to the detection result, when the level of the synchronization signal due to the defect of the tape and the set during recording and playback is below a certain value, It is possible to prevent a distortion phenomenon such as distortion of the generated screen and the shaking of the screen, thereby providing a more comfortable screen to the viewer, as well as improving the reliability of the product.

Claims (1)

입력되는 칼라신호(CS) 및 휘도신호(YS)를 혼합부(1)에서 혼합시켜 영상신호 출력버퍼(2)를 통해 영상신호로 출력되게 한 것에 있어서, 상기 출력되는 영상신호를 궤환시켜 증폭하는 버퍼단(10)과 상기 버퍼단(10)의 출력신호를 클램핑시켜 동기신호를 검출하는 동기신호 검출부(11)와, 상기 동기신호 검출부(11)의 출력신호를 공진시키는 공진회로(12)와, 상기 공진회로(12)의 출력신호를 평활하는 평활회로(13)와 상기 평활회로(13)의 출력신호에 따라 스위칭되어 동기신호의 레벨을 조절하는 동기신호 조절스위칭부(14)와 동기신호조절스위칭부(14)의 출력신호를 상기 Y/C 혼합부(1)에 궤환 입력되게 함을 특징으로하는 동기신호 검출자동 조절회로.The color signal CS and the luminance signal YS are mixed in the mixing unit 1 so as to be output as an image signal through the image signal output buffer 2, whereby the output image signal is amplified by amplification. A synchronous signal detector 11 for detecting the synchronous signal by clamping the buffer stage 10 and the output signal of the buffer stage 10, a resonant circuit 12 for resonating the output signal of the synchronous signal detector 11, and A smoothing circuit 13 for smoothing the output signal of the resonant circuit 12 and a synchronizing signal adjusting switching unit 14 and a synchronizing signal adjusting switching which are switched according to the output signal of the smoothing circuit 13 to adjust the level of the synchronizing signal. And an output signal of the unit (14) is fed back to the Y / C mixing unit (1).
KR2019880001765U 1988-02-13 1988-02-13 Sync-signal detecting control circuit KR930004830Y1 (en)

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KR2019880001765U KR930004830Y1 (en) 1988-02-13 1988-02-13 Sync-signal detecting control circuit

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Application Number Priority Date Filing Date Title
KR2019880001765U KR930004830Y1 (en) 1988-02-13 1988-02-13 Sync-signal detecting control circuit

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KR890018361U KR890018361U (en) 1989-09-09
KR930004830Y1 true KR930004830Y1 (en) 1993-07-23

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KR100799757B1 (en) * 2007-06-15 2008-02-01 삼성씨씨티비서비스(주) Video signal level detecting apparatus

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