KR930003785U - 3-state output buffer circuit - Google Patents
3-state output buffer circuitInfo
- Publication number
- KR930003785U KR930003785U KR2019910011070U KR910011070U KR930003785U KR 930003785 U KR930003785 U KR 930003785U KR 2019910011070 U KR2019910011070 U KR 2019910011070U KR 910011070 U KR910011070 U KR 910011070U KR 930003785 U KR930003785 U KR 930003785U
- Authority
- KR
- South Korea
- Prior art keywords
- output buffer
- buffer circuit
- state output
- state
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01806—Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Amplifiers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019910011070U KR930007840Y1 (en) | 1991-07-16 | 1991-07-16 | Three state output buffer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019910011070U KR930007840Y1 (en) | 1991-07-16 | 1991-07-16 | Three state output buffer circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR930003785U true KR930003785U (en) | 1993-02-26 |
KR930007840Y1 KR930007840Y1 (en) | 1993-11-18 |
Family
ID=19316594
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019910011070U KR930007840Y1 (en) | 1991-07-16 | 1991-07-16 | Three state output buffer circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930007840Y1 (en) |
-
1991
- 1991-07-16 KR KR2019910011070U patent/KR930007840Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR930007840Y1 (en) | 1993-11-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20021018 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |