KR930003485B1 - Blanking Pulse Control Circuit of TV - Google Patents

Abstract

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Description

Blanking Pulse Control Circuit of TV

1 is a conventional block diagram.

2 is a block diagram of the present invention.

3 is a block diagram of a blank pulse signal generation circuit according to the present invention;

4 is a detailed circuit diagram of an embodiment of FIG.

* Explanation of symbols for main parts of the drawings

1: video process circuit 2: video amplification circuit

3: synchronous separation circuit 4: deflection circuit

5: blanking pulse signal generating circuit 6,6a: noise filtering unit

7: Vertical blanking position adjustment circuit 8: Vertical blanking width adjustment circuit

9: HD mode horizontal adjustment circuit 10: ED mode horizontal blanking position adjustment circuit

11: HD / ED selection circuit 12: Horizontal blanking width adjustment circuit

13: NAND gate ZD ₁ -ZD ₂ : Zener diode

C ₁ -C ₉ : Capacitor VR _1- VR ₅ : Volume

R ₁ -R ₇ : Resistor IC ₁ -IC ₅ : Monostable Multivibrator

IC ₆ : Selector

The present invention relates to a blanking pulse adjusting circuit of a TV that can freely adjust the width and position of a blanking pulse, and is particularly suitable for HD (High Definition) / ED (Extended Definition) compatible displays.

In the conventional configuration, a video process circuit 1 for inputting a video signal and an output signal of the video process circuit 1 are amplified to a predetermined amplitude as shown in FIG. From the video amplifier circuit 2 for outputting, the synchronous separation circuit 2 for inputting the horizontal deflection / synchronization signal and the vertical deflection signal, and separating and outputting the horizontal deflection signal and the vertical deflection signal; The deflection circuit 4 is configured to input the output horizontal deflection signal and the vertical deflection signal, generate a deflection current according thereto, and output the deflection current to the deflection yoke of the CPT and output a blanking signal to the video amplification circuit 2.

The prior art configuration separates and outputs a horizontal deflection signal and a vertical deflection signal in the synchronous separation circuit 3, and generates a deflection current according to the deflection circuit 4 by inputting the vertical deflection signal and the vertical deflection signal. Send to deflection yoke to deflect on CPT.

In addition, a blanking pulse is generated by a flyback pulse and transmitted to the video amplifying circuit 2 to be added to the amplified video signal.

However, the prior art has the following problems.

First, since the cathode is not turned off at the part that is over-scanned during the over scan, unnecessary electron beams flow through the CPT, which consumes unnecessary power.

Second, in the projection display, the overscan light off the screen hits a wall around the screen and generates abnormal disturbing light, thereby degrading the picture quality.

The present invention aims to eliminate the above drawbacks and to provide a blanking pulse adjusting circuit of a TV which is free to adjust the width and position of the blanking pulse in response to the amount of overscan light and is suitable for an HD / ED compatible display.

In order to achieve the above object, the present invention provides the position and width of the horizontal blanking pulse signal with respect to the HD / ED mode signal by being connected between the video amplifier circuit and the deflection circuit and inputting a flyback pulse from the deflection circuit. It comprises a blanking pulse generating circuit for freely adjusting and outputting it to the video amplifier circuit.

This will be described below with reference to the accompanying drawings, FIGS. 2 to 4 as an embodiment.

2 is a block diagram of the present invention, a video process circuit 1 for inputting a video signal, a video amplification circuit 2 for amplifying an output signal of the video process circuit 1, and outputting it to a CPT; A synchronous separation circuit (3) for inputting a synchronous signal and a vertical deflection signal and outputting a horizontal deflection signal and a vertical deflection signal; Position and width of the horizontal blanking pulse signal with respect to the HD / ED mode signal selected from a deflection circuit 4 for outputting horizontal and vertical flyback pulses, and a horizontal and vertical flyback pulse from the deflection circuit 4 and externally selected. It is composed of a blanking pulse generating circuit (5) for freely adjusting and outputting it to the video amplifier circuit.

3 is a block diagram of a blanking pulse generating circuit. A vertical blanking position adjusting circuit 7 capable of shifting the vertical flyback pulse Vp of the deflection circuit 4 by more than Shift and 1V (unit vertical section) is possible. And vertical blanking width adjustment circuit 8 for adjusting the blanking pulse width to sufficiently cut off the vertical overscan, and HD horizontal blanking for shifting the horizontal flyback pulse signal Hp of the deflection circuit 4 and adjusting the position of 1H or more. An ED horizontal blanking position adjusting circuit 10 capable of inputting an output signal of the position adjusting circuit 9 and the HD horizontal blanking position adjusting circuit 9 and shifting it and adjusting a position of 1H or more (unit horizontal section) or more, and the HD HD / ED selection circuit 11 which outputs a signal by an external selection signal among the output signals of the horizontal blanking position adjusting circuit 9 and the ED horizontal blanking position adjusting circuit 10, and the horizontal overscan can be sufficiently cut off. Pricing blank The horizontal blanking width adjusting circuit 12 capable of adjusting the king pulse width and the NAND gate 13 for inputting the horizontal and vertical blanking pulse signals and synthesizing them to output the blanking signals.

4 is a view illustrating an embodiment of a blanking signal generating circuit 5 according to the present invention, and includes a resistor R ₁ , a capacitor C ₁ , and a zener diode ZD ₁ for clamping. A horizontal flyback pulse signal input and composed of a first noise filtering unit 6 for filtering noise of the flyback pulse signal, a resistor R ₇ , a capacitor C ₂ , and a zener diode ZD ₂ for clamping A second noise filtering unit 6a for filtering out the noise of the resistor, a resistor R ₂ (R ₃ ), a capacitor C ₂ (C ₃ ), and a monostable multivibrator (in this embodiment, 74 LS 221 is used) ( IC ₁ ) and a vertical blanking position adjustment circuit 7 comprising a vertical blanking position adjustment volume Vol ₁ (VR ₁ ), a capacitor C ₄ and a monostable multivibrator (in this embodiment, 74 LS 221) and ₂₎ the vertical blanking width adjusting volume (VR ₂₎ the vertical blanking width adjustment circuit 8 consisting of, Wherein (R _4, R ₅₎ and capacitor (C ₆ -C ₇₎ and the monostable multivibrator (in this embodiment 74 LS 221 used) (IC ₃₎ and HD horizontal blanking position adjustment volume (VR ₃₎ HD consisting of Horizontal blanking position adjusting circuit 9, resistor R ₆ , capacitor C ₈ , monostable multivibrator (in this embodiment, 74 LS 221 used) (IC ₄ ), ED horizontal blanking position adjusting volume VR ₄ ) an HD horizontal ED positioning circuit 10 consisting of an ED horizontal blanking position adjusting circuit 10, an HD / ED selection circuit 11 consisting of a selector (in this embodiment, 74 LS 157 N) (IC ₆ ), and a capacitor C _9. ) and a monostable multivibrator (in this embodiment 74 LS 221 used) (the IC ₅₎ and a horizontal blanking width adjustment volume (VR _5), a horizontal blanking width adjustment circuit 12 consisting of, the horizontal and vertical blanking pulse signal The NAND gate 13 outputs a blanking signal by inputting and synthesizing it. Here, the resistors and capacitors connected to the respective multivibrators IC _{1 to} IC ₅ are used to determine the time constant.

Referring to the operation of the configuration according to the present invention as follows.

First, the vertical flyback pulse Vp input from the deflection circuit 4 of FIG. 2 is shifted by the volume VR ₁ in the monostable multivibrator IC ₁ in the vertical blanking position adjustment circuit 7 of FIG. Position adjustment of 1V or more is possible, and then the monostable multivibrator IC ₂ in the vertical blanking width adjusting circuit 8 is adjusted to a blanking pulse width that can sufficiently cut off the overscan by the volume VR ₂ . It is input to the NAND gate 13 of 4 degrees.

On the other hand, the horizontal flyback pulse Hp input from the deflection circuit 4 of FIG. ₂ is shifted by the monostable multivibrator IC ₃ in the HD horizontal blanking positioning circuit 9 in FIG. Since the position adjustment is possible and the scan time is longer than HD in the case of ED, the output signal of the HD horizontal blanking position adjusting circuit 9 is transmitted from the monostable multivibrator IC ₄ in the ED horizontal blanking position adjusting circuit 10. The volume VR ₄ enables shifting and position adjustment of 1H or more.

The two output signals of the HD and ED horizontal blanking position adjusting circuits 9 and 10 are selected by the HD / ED selection signal from the outside in the HD / ED selection circuit 11 of FIG. Is adjusted to a blanking pulse width capable of sufficiently cutting off the horizontal overscan by the volume VR ₅ in the monostable multivibrator IC ₅ in the horizontal blanking width adjusting circuit 12, thereby adjusting the NAND gate 13 of FIG. ) Is entered.

Therefore, the vertical blanking pulse and the horizontal blanking pulse, which are output signals of the vertical blanking width adjusting circuit 8 and the horizontal blanking width adjusting circuit 12, are input to the NAND gate 13. A signal is made and output to the video amplifier circuit 2 of FIG.

As described above, the position and width of the blanking pulse can be freely adjusted for each of the HD / ED modes according to the present invention, thereby preventing unnecessary power consumption caused by overscan, and abnormally radiated light of the overscan light beyond the screen surface. There is an effect that can prevent the degradation of image quality.

Claims (3)

A video processor circuit for inputting and processing a video signal, a video amplifying circuit for amplifying the output signal of the video processor circuit with a predetermined amplification signal, and outputting it to a CPT, a horizontal deflection / synchronization signal and a vertical deflection signal, A synchronization circuit for separating and outputting a vertical deflection signal, a deflection circuit for inputting the horizontal deflection signal and the vertical deflection signal, outputting a deflection current according to the deflection yoke, and simultaneously outputting horizontal and vertical flyback pulses; Blanking which is connected between the amplifying circuit and the deflection circuit and inputs horizontal and vertical flyback pulses from the deflection circuit to freely adjust the position and width of the blanking pulse with respect to the HD / ED mode signal selected from the outside, and outputs it to the video amplifying circuit. A blanking pulse adjustment circuit for a TV, characterized by comprising a signal generation circuit. The blanking signal generating circuit of claim 1, wherein the blanking signal generating circuit comprises: a first noise filtering unit and a second noise filtering unit for filtering the noise of the vertical flyback pulse and the horizontal flyback pulse, respectively, and an output signal of the second noise filtering unit; Vertical blanking position adjusting circuit which can be shifted more than shift and unit vertical section, Vertical blanking width adjusting circuit which adjusts the pulse width of output signal of the vertical blanking position adjusting circuit to cut off vertical overscan sufficiently, Shift of horizontal flyback signal And an HD horizontal blanking position adjusting circuit capable of adjusting a position over a unit horizontal section, an ED horizontal blanking position adjusting circuit for inputting an output signal of the horizontal blanking position adjusting circuit of a horizontal deflection, and shifting the position over a unit horizontal section. One of the two outputs of the HD / ED mode horizontal blanking position adjustment circuit Horizontal blanking width adjustment circuit capable of inputting the output signal of the HD / ED selection circuit outputted by the selection signal and the deflection / horizontal deflection selection circuit and capable of sufficiently cutting off the horizontal overscan, and the horizontal blanking width adjustment circuit, and the vertical blanking width adjustment A blanking pulse adjustment circuit of a TV comprising a NAND gate for inputting an output signal of a circuit and a horizontal blanking width adjustment circuit and synthesizing the output signal to a video amplification circuit. 3. The blanking pulse adjustment circuit of a TV according to claim 2, wherein each adjustment circuit comprises a monostable multivibrator and a volume.