KR930003293Y1 - Fm trap circuit for receiving 6 ch of tuner - Google Patents
Fm trap circuit for receiving 6 ch of tuner Download PDFInfo
- Publication number
- KR930003293Y1 KR930003293Y1 KR2019900009327U KR900009327U KR930003293Y1 KR 930003293 Y1 KR930003293 Y1 KR 930003293Y1 KR 2019900009327 U KR2019900009327 U KR 2019900009327U KR 900009327 U KR900009327 U KR 900009327U KR 930003293 Y1 KR930003293 Y1 KR 930003293Y1
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- trap
- receiving
- tuner
- capacitor
- stage
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/60—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals
Abstract
내용 없음.No content.
Description
제1도는 종래의 회로도.1 is a conventional circuit diagram.
제2도는 제1도의 감쇄특성도.2 is attenuation characteristic diagram of FIG.
제3도는 본 고안의 회로도.3 is a circuit diagram of the present invention.
제4도는 본 고안의 감쇄특성도.4 is a damping characteristic of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : HPF 11 : 입력동조단10: HPF 11: Input tuning stage
Q1,Q2: 트랜지스터 D1,D2: 스위칭다이오드Q 1 , Q 2 : Transistor D 1 , D 2 : Switching Diode
R1-R5: 저항 C1-C7: 콘덴서R 1 -R 5 : Resistor C 1 -C 7 : Capacitor
L1-L3: 인덕터L 1 -L 3 : Inductor
본 고안은 튜너의 FM 트랩회로에 관한 것으로, 특히 에어(Air) 6채널 수신시 FM 대역트랩 감쇄비를 증가시켜 방해 리젝션비를 개선한 튜너의 6채널 수신시 FM 트랩회로에 관한 것이다.The present invention relates to an FM trap circuit of a tuner, and more particularly, to an FM trap circuit for six channel reception of a tuner which improves the interference rejection ratio by increasing the FM band trap attenuation ratio when receiving an air 6 channel.
FM 주파수 대역은 88㎒-108㎒ 이지만 CATV밴드를 제외한 주파수대역은 88㎒-91.8㎒ 이므로, 이 대역을 감쇄시켜 에어 6채널 수신시나 CA A-5, A-4 채널수신시 타 밴드의 영향을 배제시켜야 한다.The FM frequency band is 88MHz-108MHz, but the frequency band except the CATV band is 88MHz-91.8MHz, so this band is attenuated to affect the effects of other bands when receiving 6-channel air or receiving CA A-5 and A-4 channels. Should be excluded.
그러나, 어떠한 채널이 선택되더라도 상기한 88㎒-91.8㎒가 항상 감쇄되게 할 필요는 없다.However, no matter which channel is selected, it is not necessary that the above 88 MHz-91.8 MHz is always attenuated.
가령 6채널 수신시에만 상기 대역의 FM 트랩이 동작되게하고 A-5채널 등 기타 수신시에는 FM트랩이 동작되지 않도록 설계하여도 무방하다.For example, the FM trap of the band may be operated only when receiving 6 channels, and the FM trap may not be operated when receiving other signals such as the A-5 channel.
왜냐하면 6채널 이외의 채널수신시에는 상기 88㎒-91.8㎒ 대역에 의한 영향을 받지않기 때문이다.This is because, when receiving channels other than 6 channels, they are not affected by the 88 MHz-91.8 MHz band.
이러한 취지에서 종래에는 제1도에서 도시하고 있는 바와같이 6채널 FM 트랩회로가 사용되었다.For this purpose, a six-channel FM trap circuit has conventionally been used as shown in FIG.
이를 설명하면 다음과 같다.This is described as follows.
6채널이 선택되면 PLL IC에서 로우레벨의 제어신호가 발생되므로 트랜지스터(Q1)가 온되어 믹서단의 Vcc전압이 저항(R2,R3)을 거쳐 스위칭다이오드(D1)의 캐소드측에 인가된다.When six channels are selected, a low level control signal is generated from the PLL IC, so the transistor Q 1 is turned on so that the Vcc voltage of the mixer stage passes through the resistors R 2 and R 3 to the cathode of the switching diode D 1 . Is approved.
따라서, 저항(R1)을 통한 VHF 하이 및 로우밴드 선택전압(BH, BL)으로 바이어스되고 있는 상기 스위칭 다이오드(D1)는 오프되므로, HPF(하이패스필터)(10)를 거친 6채널 주파수는 인덕터(L1)와 콘덴서(C1)에 의한 트랩회로를 통하면서 88㎒-94㎒ 대역을 감쇄시킨후 입력동조단(11)에서 동조되어 출력된다.Therefore, since the switching diode D 1 biased to the VHF high and low band selection voltages BH and BL through the resistor R 1 is turned off, the six-channel frequency passed through the HPF (high pass filter) 10. Is attenuated in the 88MHz-94MHz band through the trap circuit by the inductor (L 1 ) and condenser (C 1 ) and is output after being tuned in the input tuning stage (11).
이때, 상기 인덕터(L1)와 콘덴서(C1)의 트랩회로에서는 제2도에서 도시하고 있는 바와같이 약 3dB 정도의 감쇄비를 가지는 88㎒-94㎒ 대역에서 리젝션이 일어난다.At this time, in the trap circuit of the inductor L 1 and the capacitor C 1 , rejection occurs in the 88 MHz to 94 MHz band having an attenuation ratio of about 3 dB as shown in FIG. 2.
제1도에서 C3,C4는 커플링콘덴서를 나타내고 있다.In FIG. 1, C 3 and C 4 represent coupling capacitors.
반면에, 6채널 이외의 채널수신시에는 PLL IC에서 하이레벨의 제어신호가 나오므로 이때에는 스위칭다이오드(D1)가 저항(R1-R3)에 의한 VHF 하이 및 로우밴드선택전압(BH,BL)으로 온되기 때문에, 커플링콘덴서(C3)를 거친 HPF(10)의 출력신호는 바이패스콘덴서(C2)와 스위칭다이오드(D1)와 커플링콘덴서(C4)를 통하여 입력동조단(11)으로 인가되게 된다. 따라서 인덕터(L1) 및 콘덴서(C1)의 트랩회로는 쇼트상태가 되어 88㎒-94㎒ 대역의 리젝션이 일어나지 않게된다. 그러나 상기와같은 종래의 트랩회로에서의 6채널 수신시 FM 트랩은 그 감쇄비가 3-4dB에 불과하므로 FM밴드의 영향을 받기 쉬우며, 특히 채널6이외의 수신채널에서는 바이패스콘덴서(C2)와 스위칭다이오드(D1)에 의한 신호감쇄가 발생되는 문제가 있었고, 또한 VHF 하이 및 로우밴드 선택전압이 요구되는 문제가 있었다.On the other hand, when receiving a channel other than 6 channels, the PLL IC outputs a high level control signal. At this time, the switching diode D 1 causes the VHF high and low band selection voltages (BH) by the resistors R 1 -R 3 . Since it is turned on in BL, the output signal of the HPF 10 passing through the coupling capacitor C 3 is input through the bypass capacitor C 2 , the switching diode D 1 , and the coupling capacitor C 4 . It is applied to the tuning stage (11). Accordingly, the trap circuits of the inductor L 1 and the capacitor C 1 are shorted so that rejection of the 88 MHz to 94 MHz band does not occur. However, when the six-channel reception in the conventional trap circuit as described above, the FM trap is easily affected by the FM band because its attenuation ratio is only 3-4 dB, especially in the receiving channel other than channel 6, bypass capacitor (C 2 ). There was a problem that the signal attenuation caused by the switching diode (D 1 ) and the VHF high and low band selection voltage was required.
본 고안의 목적은 믹싱 Vcc전압 및 PLL IC 제어출력신호만으로 제어되는 간단한 6채널수신시의 FM 트랩회로를 제공하는데 있다.An object of the present invention is to provide a simple six-channel FM trap circuit controlled only by mixing Vcc voltage and PLL IC control output signal.
본 고안의 다른목적은 FM트랩 온 시에는 높은 리젝션 감쇄비를 얻을 수 있고 FM 트랩오프시에는 신호감쇄를 배제시킬 수 있는 튜너의 6채널 수신시 FM 트랩회로를 제공하는데 있다.Another object of the present invention is to provide an FM trap circuit for six-channel reception of a tuner that can obtain a high rejection rejection ratio when the FM trap is on and eliminate signal attenuation when the FM trap is off.
이하, 첨부한 도면을 참고로하여 본 고안의 실시예를 설명하면 다음과 같다.Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
제3도에서 도시하고 있는 바와같이, HPF(10)와 입력동조단(11) 사이에 트랜지스터(Q2) 및 저항(R4)을 통한 믹서단 Vcc 전압으로 제어되는 스위칭다이오드(D2)와 콘덴서(C3) 및 인덕터(L5)로 구성된 1차 FM 트랩단과 콘덴서(C5) 및 인덕터(L3)로 구성된 PLL IC의 출력으로 제어되게 연결하여 설치한다.As shown in FIG. 3, between the HPF 10 and the input tuning stage 11 and the switching diode D 2 controlled by the mixer stage Vcc voltage through the transistor Q 2 and the resistor R 4 . and install the capacitor (C 3) and an inductor (L 5) 1 car FM trap end and capacitor (C 5) and connected to be controlled by the output of the PLL IC composed of an inductor (L 3) consisting of.
또, 상기 트랜지스터(Q2)는 PLL IC의 출력으로 제어되고 연결한다.The transistor Q 2 is also controlled and connected to the output of the PLL IC.
여기에서 미설명부호 C7는 커플링 콘덴서이고 C5는 스위칭다이오드(D2)의 전류 바이패스 저항이다.Here, reference numeral C 7 is the coupling capacitor and C 5 is the current bypass resistance of the switching diode (D 2 ).
이와같이 구성된 본 고안의 작용 및 효과를 설명하면 다음과 같다.Referring to the operation and effects of the present invention configured as described above are as follows.
제3도에서, 6채널이외의 수신시에는 PLL IC에서 하이레벨이 출력되므로 스위칭다이오드(D2)는 오프되기 때문에 HPF(10)의 출력신호는 신호의 감쇄없이 커플링콘덴서(C7)를 통하여 입력동조단(11)에서 해당 동조주파수에 실려 출력된다.In FIG. 3, since the high level is output from the PLL IC when receiving other than 6 channels, the switching diode D 2 is turned off, so the output signal of the HPF 10 is coupled to the coupling capacitor C 7 without attenuating the signal. Through the input tuning stage 11 is carried on the corresponding tuning frequency and output.
그러나, 6채널수신시에는 PLL IC에서 로우레벨이 출력되므로 트랜지스터(Q2)가 온되어 스위칭다이오드(D2)는 트랜지스터(Q2) 및 저항(R4)을 통한 Vcc 전압과 바이패스저항(R5)에 의해 스위치 온 된다.However, since the low level is output from the PLL IC during 6-channel reception, transistor Q 2 is turned on so that switching diode D 2 switches between Vcc voltage and bypass resistor (Q 2 ) and resistor R 4 . R 5 ) is switched on.
따라서 HPF(10)와 입력동조단(11) 사이에는 콘덴서(C5) 및 인덕터(L5)로 구성되는 1차 FM 트랩단과 콘덴서(C6) 및 인덕터(L3)로 구성되는 1차 FM 트랩단과 콘덴서(C6) 및 인덕터(L3)로 구성되는 2차 FM 트랩단이 구성되므로, 제4도에서 나타내고 있는 바와같이 FM밴드(88㎒-108㎒) 전역에 걸쳐 30dB의 높은 주파수 감쇄비를 가지고 FM 밴드 리젝션이 일어나게 된다. 그러므로 6채널 수신시 타밴드에 의한 간섭이나 영향을 완전히 배재시킬 수 있게된다.Therefore, between the HPF 10 and the input tuning stage 11, the primary FM trap stage consisting of a capacitor (C 5 ) and an inductor (L 5 ) and the primary FM consisting of a capacitor (C 6 ) and an inductor (L 3 ). Since a second FM trap stage consisting of a trap stage, a capacitor (C 6 ) and an inductor (L 3 ) is constructed, a high frequency attenuation of 30 dB across the FM band (88 MHz to 108 MHz) as shown in FIG. FM band rejection occurs with rain. Therefore, it is possible to completely exclude interference or influence caused by other bands when receiving 6 channels.
이상에서 설명한 바와같이, 본 고안은 HPF단과 입력동조단 사이에 6채널 수신시에만 동작하는 간략한 구성의 2단 FM트랩회로를 설치함으로써 신포주파수 전송 및 방해리젝션비를 현저히 높일 수 있고 또한 회로구성의 단순화에 따른 생산성이 향상효과를 얻을 수 있다.As described above, the present invention provides a simple two-stage FM trap circuit that operates only when six channels are received between the HPF stage and the input tuning stage, thereby significantly increasing the frequency of sino frequency transmission and interference rejection. Productivity can be improved by simplification.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019900009327U KR930003293Y1 (en) | 1990-06-29 | 1990-06-29 | Fm trap circuit for receiving 6 ch of tuner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019900009327U KR930003293Y1 (en) | 1990-06-29 | 1990-06-29 | Fm trap circuit for receiving 6 ch of tuner |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920001559U KR920001559U (en) | 1992-01-28 |
| KR930003293Y1 true KR930003293Y1 (en) | 1993-06-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019900009327U KR930003293Y1 (en) | 1990-06-29 | 1990-06-29 | Fm trap circuit for receiving 6 ch of tuner |
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|---|---|
| KR (1) | KR930003293Y1 (en) |
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1990
- 1990-06-29 KR KR2019900009327U patent/KR930003293Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
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| KR920001559U (en) | 1992-01-28 |
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