KR920022301U - 리세트 신호 발생회로 - Google Patents

리세트 신호 발생회로

Info

Publication number
KR920022301U
KR920022301U KR2019910006201U KR910006201U KR920022301U KR 920022301 U KR920022301 U KR 920022301U KR 2019910006201 U KR2019910006201 U KR 2019910006201U KR 910006201 U KR910006201 U KR 910006201U KR 920022301 U KR920022301 U KR 920022301U
Authority
KR
South Korea
Prior art keywords
generation circuit
signal generation
reset signal
reset
circuit
Prior art date
Application number
KR2019910006201U
Other languages
English (en)
Other versions
KR930006748Y1 (ko
Inventor
박동명
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR2019910006201U priority Critical patent/KR930006748Y1/ko
Publication of KR920022301U publication Critical patent/KR920022301U/ko
Application granted granted Critical
Publication of KR930006748Y1 publication Critical patent/KR930006748Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Electronic Switches (AREA)
KR2019910006201U 1991-05-02 1991-05-02 리세트 신호 발생회로 KR930006748Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910006201U KR930006748Y1 (ko) 1991-05-02 1991-05-02 리세트 신호 발생회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910006201U KR930006748Y1 (ko) 1991-05-02 1991-05-02 리세트 신호 발생회로

Publications (2)

Publication Number Publication Date
KR920022301U true KR920022301U (ko) 1992-12-19
KR930006748Y1 KR930006748Y1 (ko) 1993-10-06

Family

ID=19313402

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910006201U KR930006748Y1 (ko) 1991-05-02 1991-05-02 리세트 신호 발생회로

Country Status (1)

Country Link
KR (1) KR930006748Y1 (ko)

Also Published As

Publication number Publication date
KR930006748Y1 (ko) 1993-10-06

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