KR920017099U - 장치간 데이타 버퍼장치 - Google Patents

장치간 데이타 버퍼장치

Info

Publication number
KR920017099U
KR920017099U KR2019910002503U KR910002503U KR920017099U KR 920017099 U KR920017099 U KR 920017099U KR 2019910002503 U KR2019910002503 U KR 2019910002503U KR 910002503 U KR910002503 U KR 910002503U KR 920017099 U KR920017099 U KR 920017099U
Authority
KR
South Korea
Prior art keywords
devices
data buffer
buffer device
data
buffer
Prior art date
Application number
KR2019910002503U
Other languages
English (en)
Other versions
KR930003122Y1 (ko
Inventor
박면전
Original Assignee
삼성항공산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성항공산업 주식회사 filed Critical 삼성항공산업 주식회사
Priority to KR2019910002503U priority Critical patent/KR930003122Y1/ko
Publication of KR920017099U publication Critical patent/KR920017099U/ko
Application granted granted Critical
Publication of KR930003122Y1 publication Critical patent/KR930003122Y1/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4059Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
KR2019910002503U 1991-02-22 1991-02-22 장치간 데이타 버퍼장치 KR930003122Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910002503U KR930003122Y1 (ko) 1991-02-22 1991-02-22 장치간 데이타 버퍼장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910002503U KR930003122Y1 (ko) 1991-02-22 1991-02-22 장치간 데이타 버퍼장치

Publications (2)

Publication Number Publication Date
KR920017099U true KR920017099U (ko) 1992-09-17
KR930003122Y1 KR930003122Y1 (ko) 1993-05-27

Family

ID=19311146

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910002503U KR930003122Y1 (ko) 1991-02-22 1991-02-22 장치간 데이타 버퍼장치

Country Status (1)

Country Link
KR (1) KR930003122Y1 (ko)

Also Published As

Publication number Publication date
KR930003122Y1 (ko) 1993-05-27

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Legal Events

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