KR920006548B1 - Communication system for preventing tips and time-faults - Google Patents

Abstract

The wireless transmitter generates codes changed with a certain interval to prevent cross and tapping. The telecommunication system comprises an transmitter including a first CPU (30), an audio scrambling circuit (20), and an amplifier (29), and a receiver including a reverse audio scrambling circuit (35), a second CPU (37) and an analog switch (36). The first CPU (30) changes the ROM address of the audio scrambling circuit (20) sequentially and sends the content in the ROM to the receiver. The receiver uses the transmitted data to match the timing of the reverse scrambling circuit (35) and controls the analog switch (36) according to the coincidence of received code and stored code.

Description

Communication system to prevent crosstalk and eavesdropping

1 is a block diagram schematically showing a conventional configuration,

2 is a transmission circuit diagram of the present invention,

3 is a receiving circuit diagram of the present invention;

4 is a flow chart of the CPU of the transmitting side according to the present invention;

5 is a flowchart of the execution side CPU of the present invention.

* Explanation of symbols for main parts of the drawings

20: secret circuit 21: microphone

22: amplifier 23, 25: low pass filter

24, 27: mixer 26, 28: high pass filter

29: summing amplifier 30, 37: CPU

31: ROM 32: Logic section

33 antenna 34 demodulation circuit

35 deactivation circuit 36 analog switch

The present invention relates to a communication system for preventing crosstalk and eavesdropping between wireless devices by adding and receiving a password when transmitting and receiving wirelessly.

Conventionally, in a communication system that does not use an audio sorambling circuit, crosstalk frequently occurs when RF frequencies are the same.

In addition, even when the voice deactivation circuit 3 is provided at the transmitting end and the voice deactivation circuit 8 at the receiving end as in FIG. 1, the same models still have concerns about crosstalk and eavesdropping. In FIG. 1, reference numeral 1 denotes a microphone, 2 a heavy amplifier, 4 voltage controlled oscillators TX and VCO, 6 an antenna, 7 a receiver, and 9 a speaker.

Disclosure of Invention The present invention has been made to solve the above problems, and an object thereof is to provide a communication system for preventing crosstalk and eavesdropping between wireless devices by adding and receiving a password that is changed at a predetermined time interval during wireless transmission and reception.

The present invention provides a communication system for preventing crosstalk and eavesdropping between wireless devices by adding a password during wireless transmission and reception in order to achieve the above object, comprising a microphone, an amplifier connected to the microphone, a first CPU, the amplifier and the first CPU. Transmitting means having a sparking circuit connected to the circuit, a summing amplifier connected to the secreting circuit, and a modulation input line connected to the summation amplifier and the first CPU; And an antenna, a reception demodulation circuit connected to the antenna, an inverse decryption circuit connected to the reception demodulation circuit, a second CPU connected to the reception demodulation circuit 34, and an analog connection to the second CPU and the inverse decryption circuit. And a receiving means having a switch.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings. 2 is a transmission circuit diagram of the present invention, FIG. 3 is a reception circuit diagram of the present invention, FIG. 4 is a flowchart showing the execution side CPU according to the present invention, and FIG. 5 is a flowchart showing the execution side CPU according to the present invention.

In the figure, 20 is a secret circuit, 21 is a microphone, 22 is an amplifier, 23 is a low pass filter, 24 is a mixer, 25 is a low pass filter, 26 is a high pass filter, 27 is a mixer, 28 is a high pass filter, 29 is A summing amplifier, 30 denotes a CPU, 31 denotes a ROM, 32 denotes a logic unit, 33 denotes an antenna, 34 denotes a demodulation unit, 35 denotes an inversion circuit, 36 denotes an analog switch, 37 denotes a CPU, and R1 to R3 denote resistances.

As shown in FIG. 2, the audio signal input through the microphone 21 passes through the amplifier 22, and then through the secretion circuit 20, through the summation amplifier 25, the modulation input of the voltage controlled oscillator (not shown). To be modulated and transmitted.

On the receiving side in FIG. 3, the transmitted signal at the transmitting side is received via the antenna 33 and applied to the de-sequence circuit and the serial port of the CPU 37 via the receiving demodulator 34. FIG. The audio signal is then output to the speaker by the on and off control of the CPU 37.

In FIG. 2, the secretion circuit 20 divides the input audio into a low pass and a high pass filter 23 and 26 into a low pass and a high pass of the frequency spectrum (this division frequency is controlled by the CPU 30 as shown in [Table 1]). To the mixers 24 and 27, respectively, and are mixed with the respective band carrier frequencies FC1 and FC2, which are also determined by the ROM addresses coming from the CPU 30.

[Table 1] below is an example of the classification frequency and carrier frequency notation when the ROM address is 5 bits.

TABLE 1

The upper band carrier is then removed while passing through the low and high pass filters 25 and 28. In addition, each output is collected by the summation amplifier 29, enters the input of the voltage controlled generator, and is variably transmitted.

The deactivation circuit 35 on the receiving side proceeds in the same way by the same ROM address as the transmitting side and is received. For example, in the case where the CPU 30 has a 4-bit signal processing capability, if the password is set to 8 bits as shown in [Table 2] above, the 5-bit ROM address data is secreted while sequentially pushing back one bit at a time. Input to the circuit ROM.

TABLE 2

At this time, the CPU 30 inputs the ROM address data at intervals of about 0.5 seconds (this time is determined by the software of the CPU in advance) while the internal timer is turned on using the clock.

At this time, the CPU 30 transmits the password to the VCO (voltage controlled oscillator) input through the serial port in a very short period in order to match the receiving side and the secret circuit 20.

Referring to FIG. 4, the process of the CPU 30 will be briefly described. First, the password is extracted from the embedded RPOM 41 and applied to the external ROM 31 and the modulation input terminal 42 and 43. Then, the extracted password is shifted by one bit (44), waits for a preset time (45), and then repeatedly applied to the external ROM 31 and the modulation input terminal (42, 43). The preset password is sequentially shifted by 1 bit and output.

As a result, the CPU 30 transmits the password at a predetermined time interval with the receiving side in advance, and outputs it to the secreting circuit 20 by changing the ROM address in the order shown in Table 2 above.

Then, the audio received through the microphone 21 is divided into low and high frequencies by a ROM address that is changed at a predetermined time interval from the CPU 30, and the carrier frequency which is modulated is also changed at a predetermined time interval, and is summed through the sparking circuit 20. The audio frequency is changed at regular intervals.

On the receiving side, as shown in FIG. 3, demodulated incoming synchronous data (password) is input to the serial port of the CPU 37. When the same as the password set in advance with the transmitting side, the CPU 37 turns on the analog switch ( ON), and the deactivation circuit 35 on the receiving side at this time proceeds with the ROM address as in the algorithm shown in [Table 2] on the transmitting side, so that the descrambler is correctly descrambled. Thus, the audio signal is sent out through the speaker.

In this case, the process of the CPU 37 will be briefly described with reference to FIG. 5. The data (password) is received from the reception demodulator 34 (51), and the password is extracted from the embedded ROM (52). The data are compared with the data (53). If the two values are not the same (54), the analog switch is turned off (55), and new data is input and compared. If the comparison result is the same (54), the analog switch is turned off to be applied to the received audio signal gas picker (56). Then, the password is shifted by one bit (57), the timer is turned on (58), the timer waits for a preset time (59), and the data (password) is input from the reception demodulator 34 (60). Compared with the twin password (61), the process (54-6l) is repeated to determine the match and process.

However, if the received synchronization data does not match the preset password, the CPU 37 turns off the analog switch 36 so that audio from another wireless device is not applied to the speaker.

In addition, since the secreting and inverse sparking circuits are employed, they cannot be recognized by the receiving circuits of other radio devices that do not employ such circuits. ), Because the preset password is changed and outputted by 1 bit in sequence (see [Table 2]), other wireless communication devices of the same model also do not recognize the password that is periodically changed. Due to the ROM address, it becomes impossible to synchronize with the audio frequency spectrum which is continuously changed at predetermined time intervals.

Accordingly, the present invention can be configured and operated as described above to effectively prevent crosstalk and eavesdropping between wireless devices.

Claims (4)

In a communication system for preventing crosstalk and eavesdropping between wireless devices by adding a password during wireless transmission and reception, a microphone 21, an amplifier 22 connected to the microphone 21, a first CPU 30, and the amplifier (22) and a sparking circuit (20) connected to the first CPU (30), a summing amplifier (29) connected to the sparking circuit, and a modulation input line connected to the summing amplifier (29) and the first CPU (30); Transmission means; And an antenna 33, a reception demodulation circuit 34 connected to the antenna 33, an inverse spark circuit 35 connected to the reception demodulation circuit 34, and the reception demodulation circuit 34. Receiving means having a connected second CPU 37 and an analog switch 36 connected to the second CPU 37 and the de-ignition circuit 35; Communication system for preventing crosstalk and eavesdropping, characterized in that configured to include. 2. The communication system according to claim 1, wherein said secreting circuit (20) of said transmitting means comprises a ROM (31) connected to said first CPU (30). 3. The method of claim 2, wherein the first CPU 30 sequentially changes the ROM address of the secreting circuit 20 at predetermined time intervals and transmits the same to the receiving means, and the receiving means uses the transmitted data as synchronization data. And the second CPU 37 controls the analog switch 36 according to whether the received password and the stored internal password match each other while matching the timing of the deactivation circuit 35. Communication system to prevent damage. 2. The circuit according to claim 1, wherein the secreting circuit (20) of the transmitting means is connected to a first low pass filter (23) and a first high pass filter (26) connected to the amplifier (22) and to the first low pass filter. A first mixer 24, a second mixer 27 connected to the first high pass filter, a second low pass filter 25 connected to the first mixer, and a second high pass connected to the second mixer Filter 28, and the outputs of the second low pass filter and the second high pass filter 25, 28 are connected to be input to the summing amplifier 29. Communication system to prevent.

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