KR910014739U - PLL control circuit - Google Patents

PLL control circuit

Info

Publication number
KR910014739U
KR910014739U KR2019900000694U KR900000694U KR910014739U KR 910014739 U KR910014739 U KR 910014739U KR 2019900000694 U KR2019900000694 U KR 2019900000694U KR 900000694 U KR900000694 U KR 900000694U KR 910014739 U KR910014739 U KR 910014739U
Authority
KR
South Korea
Prior art keywords
control circuit
pll control
pll
circuit
control
Prior art date
Application number
KR2019900000694U
Other languages
Korean (ko)
Other versions
KR960000055Y1 (en
Inventor
염보선
Original Assignee
금성통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성통신 주식회사 filed Critical 금성통신 주식회사
Priority to KR2019900000694U priority Critical patent/KR960000055Y1/en
Publication of KR910014739U publication Critical patent/KR910014739U/en
Application granted granted Critical
Publication of KR960000055Y1 publication Critical patent/KR960000055Y1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
KR2019900000694U 1990-01-22 1990-01-22 Pll control circuit KR960000055Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019900000694U KR960000055Y1 (en) 1990-01-22 1990-01-22 Pll control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019900000694U KR960000055Y1 (en) 1990-01-22 1990-01-22 Pll control circuit

Publications (2)

Publication Number Publication Date
KR910014739U true KR910014739U (en) 1991-08-31
KR960000055Y1 KR960000055Y1 (en) 1996-01-04

Family

ID=19295442

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019900000694U KR960000055Y1 (en) 1990-01-22 1990-01-22 Pll control circuit

Country Status (1)

Country Link
KR (1) KR960000055Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100382014B1 (en) * 2000-03-08 2003-05-01 가부시키가이샤 히타치세이사쿠쇼 Voltage controlled oscillator and pll circuit using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100382014B1 (en) * 2000-03-08 2003-05-01 가부시키가이샤 히타치세이사쿠쇼 Voltage controlled oscillator and pll circuit using the same

Also Published As

Publication number Publication date
KR960000055Y1 (en) 1996-01-04

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Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
LAPS Lapse due to unpaid annual fee