KR910013350U - Real-time domain division circuit - Google Patents

Real-time domain division circuit

Info

Publication number
KR910013350U
KR910013350U KR2019890019463U KR890019463U KR910013350U KR 910013350 U KR910013350 U KR 910013350U KR 2019890019463 U KR2019890019463 U KR 2019890019463U KR 890019463 U KR890019463 U KR 890019463U KR 910013350 U KR910013350 U KR 910013350U
Authority
KR
South Korea
Prior art keywords
real
time domain
division circuit
domain division
circuit
Prior art date
Application number
KR2019890019463U
Other languages
Korean (ko)
Other versions
KR920007326Y1 (en
Inventor
천인서
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019890019463U priority Critical patent/KR920007326Y1/en
Publication of KR910013350U publication Critical patent/KR910013350U/en
Application granted granted Critical
Publication of KR920007326Y1 publication Critical patent/KR920007326Y1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/10Segmentation; Edge detection
    • G06T7/11Region-based segmentation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/04Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733Controllable logic circuits
    • H03K19/1737Controllable logic circuits using multiplexers
KR2019890019463U 1989-12-21 1989-12-21 Region splitting circuit KR920007326Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890019463U KR920007326Y1 (en) 1989-12-21 1989-12-21 Region splitting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890019463U KR920007326Y1 (en) 1989-12-21 1989-12-21 Region splitting circuit

Publications (2)

Publication Number Publication Date
KR910013350U true KR910013350U (en) 1991-07-30
KR920007326Y1 KR920007326Y1 (en) 1992-10-12

Family

ID=19293607

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890019463U KR920007326Y1 (en) 1989-12-21 1989-12-21 Region splitting circuit

Country Status (1)

Country Link
KR (1) KR920007326Y1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100480564B1 (en) * 1997-08-26 2005-06-16 삼성전자주식회사 Image segmentation and color synthesis circuit

Also Published As

Publication number Publication date
KR920007326Y1 (en) 1992-10-12

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Year of fee payment: 13

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