KR910013201A - Noise Reduction Circuit of Luminance Signal in High Resolution Mode Playback - Google Patents

Noise Reduction Circuit of Luminance Signal in High Resolution Mode Playback Download PDF

Info

Publication number
KR910013201A
KR910013201A KR1019890018749A KR890018749A KR910013201A KR 910013201 A KR910013201 A KR 910013201A KR 1019890018749 A KR1019890018749 A KR 1019890018749A KR 890018749 A KR890018749 A KR 890018749A KR 910013201 A KR910013201 A KR 910013201A
Authority
KR
South Korea
Prior art keywords
signal
unit
inputting
luminance signal
adjusting
Prior art date
Application number
KR1019890018749A
Other languages
Korean (ko)
Other versions
KR0126399B1 (en
Inventor
백종관
Original Assignee
강진구
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019890018749A priority Critical patent/KR0126399B1/en
Publication of KR910013201A publication Critical patent/KR910013201A/en
Application granted granted Critical
Publication of KR0126399B1 publication Critical patent/KR0126399B1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/24—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing noise

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

내용 없음.No content.

Description

고해상도 모드 재생시 휘도신호의 노이즈 제거회로Noise Reduction Circuit of Luminance Signal in High Resolution Mode Playback

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제4도는 본 발명에 따른 블럭도,4 is a block diagram according to the present invention,

제5도는 제4도중 노이즈 제거회로(30)의 구체회로도.5 is a detailed circuit diagram of the noise removing circuit 30 in FIG.

Claims (1)

복조기(10)와 디엠파시스부(20)와, 로우패스필터(40)와 클램프부(50)와, 중폭부(60)를 구비한 고행상도 모드 재생시 휘도신호의 노이즈 제거회로에 있어서, 디엠파시스부(20)로부터 출력된 휘도 신호를 입력하여 안정화 시키기 위한 버퍼부(31)와, 상기 버퍼부(31)로부터 출력된 신호를 입력하여 감쇄시켜 출력하는 감쇄기(32)와, 상기 버퍼부(31)에서 안정된 휘도 신호를 입력하여 위상을 소정레벨로 제어하는 위상 제어부(33)와, 상기 위상제어부(33)에서 제어된 신호를 입력하여 신호를 1H 지연시켜 출력하는 지연부(34)와, 상기 지연부(34)에서 지연된 신호를 소정레벨로 조정하여 출력하는 신호 조정부(35)와, 상기 감쇄기(32)의 출력신호와 신호조정부(35)의 출력인 1H 지연되어 소정레벨로 조정된 신호를 합성하여 노이즈를 제거 출력하는 신호합성부(36)로 구성됨을 특징으로 하는 회로.In the noise canceling circuit of the luminance signal during high resolution mode reproduction, comprising a demodulator 10, a deemphasis section 20, a low pass filter 40, a clamp section 50, and a medium width section 60, A buffer unit 31 for inputting and stabilizing the luminance signal output from the de-emphasis unit 20, an attenuator 32 for inputting and attenuating and outputting the signal output from the buffer unit 31, and the buffer A phase controller 33 for inputting a stable luminance signal in the unit 31 to control the phase to a predetermined level, and a delay unit 34 for inputting the signal controlled by the phase controller 33 to delay the signal by 1H and outputting the signal. And a signal adjusting unit 35 for adjusting and outputting the signal delayed by the delay unit 34 to a predetermined level, and adjusting the signal delayed by 1H, which is the output signal of the attenuator 32 and the output of the signal adjusting unit 35, to a predetermined level. Is composed of a signal synthesizing unit 36 for synthesizing the extracted signals to remove noise Characterized by a circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890018749A 1989-12-16 1989-12-16 Noise reducing circuit for high definition mode reproduction KR0126399B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890018749A KR0126399B1 (en) 1989-12-16 1989-12-16 Noise reducing circuit for high definition mode reproduction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890018749A KR0126399B1 (en) 1989-12-16 1989-12-16 Noise reducing circuit for high definition mode reproduction

Publications (2)

Publication Number Publication Date
KR910013201A true KR910013201A (en) 1991-08-08
KR0126399B1 KR0126399B1 (en) 1997-12-26

Family

ID=19293045

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890018749A KR0126399B1 (en) 1989-12-16 1989-12-16 Noise reducing circuit for high definition mode reproduction

Country Status (1)

Country Link
KR (1) KR0126399B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101965609B1 (en) 2016-09-09 2019-04-08 율촌화학 주식회사 Stretch releasing pressure sensitive adhesive films and methods of manufacturingthe same

Also Published As

Publication number Publication date
KR0126399B1 (en) 1997-12-26

Similar Documents

Publication Publication Date Title
KR840001034A (en) Noise reduction circuit
KR850007351A (en) Magnetic recording and playback device for text signal
KR910006921A (en) Image signal processing circuit
KR910009055A (en) Video signal noise reduction circuit
KR860007660A (en) Noise reduction circuit
KR920005090A (en) Playback device
KR890015501A (en) Digital filter which enabled video emphasis processing by mode switching
KR920001439A (en) Volume control circuit
KR910013201A (en) Noise Reduction Circuit of Luminance Signal in High Resolution Mode Playback
KR920011286A (en) Copper signal detection circuit
KR890016850A (en) Mode discrimination circuit
KR910021124A (en) Vertical contour adjustment method according to screen brightness
KR930001181A (en) Dynamic regeneration circuit and method
KR880004464A (en) Digital signal regeneration circuit device
KR910004005A (en) Horizontal contour correction method and circuit
JPS56124107A (en) Sound recording and reproducing switching circuit
KR920017070A (en) High Frequency Adaptive De-emphasis and Re-emphasis in Video Signals Using Recorded Control Signals
KR910002285A (en) Luminance Signal Processing Circuit Using 3 Line Logic Comb Filter
KR960035593A (en) Low pass filter control device
KR930001724A (en) Dynamic regeneration circuit and method
KR910008708A (en) Nonlinear Emphasis and Emphasis Circuit
KR930004991A (en) Y-Noise Control Circuit During Video Playback
KR870011575A (en) Voice signal accompaniment
SU1040518A1 (en) Device for signal reproduction and noise suppression
KR920000058A (en) Video signal playback device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20050929

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee