KR910012878U - 16비트 병렬 테스트회로 - Google Patents
16비트 병렬 테스트회로Info
- Publication number
- KR910012878U KR910012878U KR2019890019397U KR890019397U KR910012878U KR 910012878 U KR910012878 U KR 910012878U KR 2019890019397 U KR2019890019397 U KR 2019890019397U KR 890019397 U KR890019397 U KR 890019397U KR 910012878 U KR910012878 U KR 910012878U
- Authority
- KR
- South Korea
- Prior art keywords
- test circuit
- bit parallel
- parallel test
- bit
- circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/26—Accessing multiple arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C2029/1802—Address decoder
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/26—Accessing multiple arrays
- G11C2029/2602—Concurrent test
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019890019397U KR950000141Y1 (ko) | 1989-12-20 | 1989-12-20 | 16비트 병렬 테스트회로 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019890019397U KR950000141Y1 (ko) | 1989-12-20 | 1989-12-20 | 16비트 병렬 테스트회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR910012878U true KR910012878U (ko) | 1991-07-30 |
| KR950000141Y1 KR950000141Y1 (ko) | 1995-01-10 |
Family
ID=19293545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019890019397U KR950000141Y1 (ko) | 1989-12-20 | 1989-12-20 | 16비트 병렬 테스트회로 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR950000141Y1 (ko) |
-
1989
- 1989-12-20 KR KR2019890019397U patent/KR950000141Y1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR950000141Y1 (ko) | 1995-01-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E902 | Notification of reason for refusal | ||
| E701 | Decision to grant or registration of patent right | ||
| REGI | Registration of establishment | ||
| FPAY | Annual fee payment |
Payment date: 20031219 Year of fee payment: 10 |
|
| EXPY | Expiration of term |