KR910012467U - Memory backup circuit - Google Patents

Memory backup circuit

Info

Publication number
KR910012467U
KR910012467U KR2019890019908U KR890019908U KR910012467U KR 910012467 U KR910012467 U KR 910012467U KR 2019890019908 U KR2019890019908 U KR 2019890019908U KR 890019908 U KR890019908 U KR 890019908U KR 910012467 U KR910012467 U KR 910012467U
Authority
KR
South Korea
Prior art keywords
backup circuit
memory backup
memory
circuit
backup
Prior art date
Application number
KR2019890019908U
Other languages
Korean (ko)
Other versions
KR920003017Y1 (en
Inventor
전면수
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019890019908U priority Critical patent/KR920003017Y1/en
Publication of KR910012467U publication Critical patent/KR910012467U/en
Application granted granted Critical
Publication of KR920003017Y1 publication Critical patent/KR920003017Y1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/263Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/141Battery and back-up supplies

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
KR2019890019908U 1989-12-27 1989-12-27 Memory back-up circuit KR920003017Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890019908U KR920003017Y1 (en) 1989-12-27 1989-12-27 Memory back-up circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890019908U KR920003017Y1 (en) 1989-12-27 1989-12-27 Memory back-up circuit

Publications (2)

Publication Number Publication Date
KR910012467U true KR910012467U (en) 1991-07-30
KR920003017Y1 KR920003017Y1 (en) 1992-05-18

Family

ID=19293969

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890019908U KR920003017Y1 (en) 1989-12-27 1989-12-27 Memory back-up circuit

Country Status (1)

Country Link
KR (1) KR920003017Y1 (en)

Also Published As

Publication number Publication date
KR920003017Y1 (en) 1992-05-18

Similar Documents

Publication Publication Date Title
DE69024773T2 (en) Semiconductor memory circuit arrangement
KR890015268A (en) Semiconductor memory circuit
DE69019697D1 (en) Repairable memory circuit.
DE69032655D1 (en) Page memory control circuit
KR900012267A (en) Sense circuit for semiconductor memory
DE68920118T2 (en) Josephson memory circuit.
DE3883064D1 (en) FIXED MEMORY CIRCUIT.
DE68918568T2 (en) Integrated memory circuit.
DE69129739T2 (en) Memory circuit
DE68926541T2 (en) Address modification circuit
DE68925748D1 (en) Logical circuit
DE68923540D1 (en) Solid state circuit.
KR910012467U (en) Memory backup circuit
KR900013271U (en) Memory protection circuit
FR2648943B1 (en) SAMPLE-LOCKER CIRCUIT
KR880013091U (en) Memory capacity expansion circuit
KR910012469U (en) Memory protection circuit
KR950007223U (en) Memory backup circuit
KR950009675U (en) Memory backup circuit
KR890001271U (en) Memory area expansion circuit
KR880022667U (en) Static RAM memory backup circuit
ATA154388A (en) INTEGRATED CIRCUIT ARRANGEMENT
KR900013684U (en) OHVA circuit
KR880013090U (en) Memory expansion circuit
KR900003898U (en) Space Wider Circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19990430

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee