KR910012443U - 보드인에이블 신호 발생회로 - Google Patents

보드인에이블 신호 발생회로

Info

Publication number
KR910012443U
KR910012443U KR2019890021111U KR890021111U KR910012443U KR 910012443 U KR910012443 U KR 910012443U KR 2019890021111 U KR2019890021111 U KR 2019890021111U KR 890021111 U KR890021111 U KR 890021111U KR 910012443 U KR910012443 U KR 910012443U
Authority
KR
South Korea
Prior art keywords
generation circuit
signal generation
enable signal
board enable
board
Prior art date
Application number
KR2019890021111U
Other languages
English (en)
Other versions
KR920004987Y1 (ko
Inventor
이항운
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019890021111U priority Critical patent/KR920004987Y1/ko
Publication of KR910012443U publication Critical patent/KR910012443U/ko
Application granted granted Critical
Publication of KR920004987Y1 publication Critical patent/KR920004987Y1/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08Clock generators with changeable or programmable clock frequency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1689Synchronisation and timing concerns
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
KR2019890021111U 1989-12-30 1989-12-30 보드인에이블 신호 발생회로 KR920004987Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890021111U KR920004987Y1 (ko) 1989-12-30 1989-12-30 보드인에이블 신호 발생회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890021111U KR920004987Y1 (ko) 1989-12-30 1989-12-30 보드인에이블 신호 발생회로

Publications (2)

Publication Number Publication Date
KR910012443U true KR910012443U (ko) 1991-07-30
KR920004987Y1 KR920004987Y1 (ko) 1992-07-25

Family

ID=19294947

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890021111U KR920004987Y1 (ko) 1989-12-30 1989-12-30 보드인에이블 신호 발생회로

Country Status (1)

Country Link
KR (1) KR920004987Y1 (ko)

Also Published As

Publication number Publication date
KR920004987Y1 (ko) 1992-07-25

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