KR910009846B1 - Drop out pulse generating circuit - Google Patents

Abstract

The circuit generates dropout pulse with improved detecting capability and provides it to external terminal. The drop out detector (90) detects the dropout signals through a 1st level converter (50), a 2nd level converter (60) and a Low pass filter (80), It also outputs the dropout detecting pulse signal to an internal output terminal (150) and an external output terminal (140) of the IC.

Description

Dropout Pulse Generator Circuit

1 is a conventional dropout pulse generation circuit diagram.

2 is a block diagram of a dropout pulse generating circuit of the present invention.

3 is a dropout pulse generation circuit diagram of the present invention.

4A to K are waveform diagrams of respective parts of the dropout pulse generation circuit diagram of the present invention.

* Explanation of symbols for the main parts of the drawings

10: input terminal 20: signal input unit

30: first limiter 40: second limiter

50: first level converter 60: second level converter

70: reference level setting unit 80: low pass filter

90: dropout detection unit 100: first inverter

110: first level comparator 120: second level comparator

130: second inverter 140: integrated circuit external output terminal

150: internal output terminal of the integrated circuit

The present invention relates to a dropout pulse generating circuit for detecting a portion (dropout) in which a signal is missing from a frequency modulated signal reproduced on a tape of a video tape recorder and outputting a pulse.

In the conventional dropout pulse generating circuit, as shown in FIG. 1, the input terminal 1 has a transistor TR ₁ to TR ₆ and a resistor R ₁ to R ₄ through the coupling capacitor C ₁ . Is connected to a limiter (3) consisting of), and the output terminal of the limiter (3) is a rectifier type of resistor (R ₅ ) and capacitor (C ₂ ) through a level converter (4) consisting of transistors TR ₇ to TR ₈ . It is connected to the RC low pass filter ₅ , and the contact of the resistor R ₅ and the capacitor C ₂ is connected with a level comparator consisting of resistors R ₆ to R ₈ and transistors TR ₉ to TR ₁₄ . through the mitt trigger circuit 6, a resistance (R _9, R ₁₀₎ and a transistor as a configuration connected to the buffer circuit 7 as (TR _15, TR _16), the drop-out pulse output terminal IC chip inside the output terminal (2 There is a drawback that the dropout pulse cannot be used when constructing a high quality video tape recorder.

The present invention has been invented to eliminate the drawbacks of the conventional dropout pulse generating circuit, and is capable of outputting a pulse signal, which is a detection signal of a dropout portion, to an external output terminal by a level comparator and an inverter, as well as dropping by a limiter. It is an object of the present invention to provide a dropout pulse generation circuit with improved out detection capability.

Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the accompanying drawings.

In order to achieve the above object, the present invention provides a dropout pulse generating circuit in which a signal input unit 20 connected to a signal input terminal 10 is connected to a first level converter through a first limiter 30 and a second limiter 40. 50) and the second level converter 60, the first level converter 50 and the second level converter 60 are connected to the dropout detection unit 90 through the rectified low pass filter 80, The dropout detector 90 is connected to the integrated circuit external output terminal 140 through the second level comparator 120 and the second inverter 130, and also through the first inverter 100 and the first level comparator 110. The reference level setting unit 70 is connected to the integrated circuit internal output terminal 150 and is connected to the non-inverting terminal of the first level comparator 110 and the first limiter 30 and the second limiter 40. Has been configured.

The signal input unit 20 includes transistors TR ₂₅ to TR ₂₈ , resistors R ₁₇ to R ₂₆ , and a diode D _4. The first limiter 30 includes transistors TR ₁₇ to TR ₂₂ . The resistors R ₁₁ to R ₁₆ are formed, and the second limiter 40 is composed of transistors TR ₂₉ to TR ₃₂ and resistors R ₂₇ to R ₂₈ .

In addition, the first level converter 50 includes transistors TR ₂₃ and TR ₂₄ and the second level converter 60 includes transistors TR ₃₃ and TR ₃₄ , respectively, and the reference level setting unit 70 includes a resistor ( R ₂₉ and R ₃₀ , the low pass filter 80 includes a resistor R ₃₁ and a capacitor C ₄ , respectively, and the dropout detection unit 90 includes transistors TR ₃₅ to TR ₄₁ and resistor R. ₃₂ to R ₄₀ ), and diodes D ₅ to D ₇ .

In addition, the first and second inverters 100 and 130 are each composed of a transistor TR ₄₂ , a resistor R ₄₁ , a transistor TR ₅₅ , and a resistor R ₄₆ , and a first level comparator 110. ) Is composed of transistors TR ₄₃ and TR ₄₆ and resistors R ₄₂ and R _45. The second level comparator is composed of diodes D ₈ and D ₉ and transistors TR ₄₇ to TR ₅₄ .

2 is a block diagram of the dropout pulse generating circuit of the present invention, and FIG. 3 is a detailed circuit diagram of the dropout pulse generating circuit of the present invention, in which an input signal input to the signal input unit 20 is input to the first limiter 30 and the second. After the upper and lower amplitudes of the limiter 40 are limited, they are applied to the current-switched first level converter 50 and the current-switched second level converter 60 to change the level, and then mixed and rectified. The harmonic component (modulation signal) is removed, and the detection pulse is generated through the dropout detection unit 90 of the Schmitt trigger and the inverter and applied to the first inverter 100 and the second level comparator 120. The reference pulse of the reference level setting unit 70 sets the lower limiting level to the signal output from the first limiter 30 and the second limiter 40 by inverting the detection pulse applied to the first inverter 100. Inverting terminal of the first level comparator 110, the signal is input to the non-inverting terminal It is applied and the output of the first level comparator 110, a pulse signal is output via the internal output terminal (150). At the same time, the detection signal detected by the detector 90 is applied to the second level comparator 120 so that the output of the second level comparator 120 is input to the second inverter 130 and inverted. Through 140, a pulse signal is output.

The dropout pulse generation circuit of the present invention operating as described above will be described in detail with reference to FIG.

In the state where power is supplied to the power supply terminal Vcc and the input signal A signal shown in FIG. 4A is input to the signal input terminal 10, the first limiter 30 is controlled by the reference level setting section 70. The reference DC voltage is supplied to the transistors TR ₂₁ , TR ₂₂ and the transistors TR ₃₁ and TR ₃₂ of the second limiter 40. Then, the reference DC voltage limits the lower amplitudes of the output signal waveforms output from the first limiter 30 and the second limiter 40 so that the transistors TR ₁₇ and TR _{30 in} the first and second limiters 30 and 40 are limited. ), The B signal shown in FIG. 4B and the C signals shown in FIG. 4C are output from the collectors of the transistors TR ₁₈ and TR _{29 in} the first and second limiters 30 and 40, respectively. . At the same time, the reference DC voltage is applied to the non-inverting terminal of the first level comparator 110. The signals B and C shown in FIGS. 4B and 4C are input to the current switch type first level converter 50 and the second level converter 60, and are level-converted like the F signal shown in FIG. 4D. A frequency modulated input signal (A signal) in which a dropout input to the signal input terminal 10 is generated since the FM signal inputted to the rectified low pass filter 80 is removed, such as the G signal shown in FIG. Low frequency amplitude signal [G signal; Envelope] is obtained. This G signal is applied to the base of the transistor TR ₃₅ in the dropout detector 90. The dropout detector 90 then changes the base reference voltage of the transistor TR ₃₈ and the comparator consisting of transistors TR ₃₅ and TR ₃₈ , resistors R ₃₂ to R ₃₅ , and diodes D ₅ and D ₆ . When the dropout is detected, positive feedback is used to have the same hysteresis as the G signal shown in FIG. 4e and to increase the operation speed during the operation of the comparator.

The positive feedback portion is composed of transistors TR ₃₉ and TR ₄₀ , resistors R ₃₆ to R ₃₈ , and diode D ₇ , and the H signal shown in FIG. 4f is input to the base of transistor TR ₃₅ . When the level of the input signal is higher than the base reference voltage of the transistor TR ₃₈ , the transistor TR ₃₆ constituting the comparator is turned on and the transistor TR ₃₇ is turned off, so that the transistor TR ₃₉ of the positive feedback portion is turned on. The transistor TR ₄₀ is turned off. At this time, the reference voltage is V _R = Vcc- (I ₁ + I ₂ ) R ₃₆ -I ₁ R ₃₇ -V ₀ . Here, I1 and I2 represent current values of the constant current source.

로 되므로 순간적으로 입력신호와 기준전압의 차가 발생하여 비교기를 이루는 트랜지스터(TR₃₇)는 턴온되고, 트랜지스터(TR₃₆)는 턴오프되므로 정궤환부의 트랜지스터(TR₃₉)는 턴오프되고, 트랜지스터(TR₄₀)는 턴온된다. 그에 따라 기준전압과 입력신호의 차를 크게하는 정궤환효과가 발생하여 비교기의 기준전압은 V′_R=Vcc-I₁R₃₆-I₁R₃₁₇-V_D7로 되어 비교기의 동작속도가 빨라진다.On the other hand, when the level of the input signal decreases and becomes equal to the reference voltage (V _R ), the transistors TR ₃₉ and TR ₄₀ of the positive feedback unit are simultaneously “ON” so that the reference voltage of the comparator is

Since the difference between the input signal and the reference voltage occurs instantaneously, the transistor TR _{37, which} constitutes the comparator, is turned on, and the transistor TR ₃₆ is turned off, so that the transistor TR ₃₉ of the positive feedback portion is turned off, and the transistor TR ₄₀ ) is turned on. As a result, a positive feedback effect that increases the difference between the reference voltage and the input signal occurs, and the reference voltage of the comparator becomes V ′ _R = Vcc-I ₁ R ₃₆ -I ₁ R ₃₁₇ -V _D7 , which increases the operating speed of the comparator.

When the reverse input signal increases from a low level, a positive feedback effect is instantaneous level of the input signal as a reference voltage (V _'R) is changed to the reference voltage V _R, the comparator will be a state change. Therefore, the hysteresis Hy of the dropout detector 90 becomes the difference between the two reference voltages. That is, Hy = V ′ _R −V _R = I ₂ R ₃₆ . In addition, the one H signal shown in the output claim 4f also because of the comparator input stage in addition to using a positive feedback effect to improve the drop-out detection rate consists of an NPN transistor (TR _36, TR ₃₇₎ the dropout detector (90) After being output and applied to the first inverter 100, the inverter is inverted and input to the inverting input terminal of the first level comparator 110, that is, the resistor R ₄₂ , and is input to the inverting input terminal in the first level comparator 110. The level of the H signal and the level set by the reference level setting unit 70 are compared, and the J signal shown in FIG. 4h is output to the integrated circuit internal output terminal 150, and the output waveform of the dropout detection unit 90 is set to zero. The non-inverting terminal of the two-level comparator 120, that is, the base and the inverting terminal of the transistor TR ₄₇ , that is, the base of the transistor TR ₄₈ , is compared with the level of the second level comparator 120, as shown in FIG. Since one L signal is output, the second inverter 130 inverts and The signal shown in FIG. 4k is output to the external output terminal 140.

The dropout pulse generation circuit of the present invention, which operates as described above, can not only output the dropout detection pulse signal to the internal output terminal by the limiter, the level comparator and the inverter, but also output the dropout detection pulse signal to the integrated circuit external output terminal. It can be outputted, so it can be applied to a high-quality video tape recorder, and the dropout detection capability can be improved.

Claims (4)

The signal input unit 20 connected to the signal input terminal 10 is connected to the first level converter 50 and the second level converter 60 through the first limiter 30 and the second limiter 40. The first level converter 50 and the second level converter 60 are connected to the dropout detector 90 through the rectifying term low pass filter 80, and the dropout detector 90 is connected to the second level comparator 120 and It is connected to the integrated circuit external output terminal 140 through the second inverter 130 and is connected to the integrated circuit internal output terminal 150 through the first inverter 100 and the first level comparator 110, The non-inverting terminal of the level comparator 110 is connected to the reference level setting unit 70 connected to the first limiter 30 and the second limiter 40 to output the dropout detection pulse signal to the outside of the integrated circuit. Dropout pulse generating circuit, characterized in that. The comparator and transistors TR ₃₉ and TR ₄₀ of claim 1, wherein the dropout detection unit 90 includes transistors TR ₃₅ to TR ₃₈ , resistors R ₃₂ to R ₃₅ , and diodes D ₅ and D ₆ . ) And a dropout pulse generating circuit composed of a positive feedback portion consisting of a resistor (R ₃₆ to R ₃₈ ) and a diode (D ₇ ). The dropout pulse generating circuit according to claim 1, wherein the first limiter (30) is composed of transistors (TR ₁₇ to TR ₂₂ ) and resistors (R ₁₁ to R ₁₆ ). The dropout pulse generating circuit according to claim 1, wherein the second limiter (40) is composed of transistors (TR ₂₉ to TR ₃₂ ) and resistors (R _27, R ₂₈ ).

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