KR910008836B1 - Etching method of semiconductor device - Google Patents
Etching method of semiconductor device Download PDFInfo
- Publication number
- KR910008836B1 KR910008836B1 KR1019880015770A KR880015770A KR910008836B1 KR 910008836 B1 KR910008836 B1 KR 910008836B1 KR 1019880015770 A KR1019880015770 A KR 1019880015770A KR 880015770 A KR880015770 A KR 880015770A KR 910008836 B1 KR910008836 B1 KR 910008836B1
- Authority
- KR
- South Korea
- Prior art keywords
- photoresist
- pattern
- development
- bed
- exposure
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 65
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 238000005530 etching Methods 0.000 title 1
- 230000008569 process Effects 0.000 claims abstract description 56
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 16
- 238000000206 photolithography Methods 0.000 claims abstract description 7
- 230000018109 developmental process Effects 0.000 description 20
- 230000008570 general process Effects 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000003780 keratinization Effects 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
제1도는 반도체 사진 식각 공정도로서,1 is a semiconductor photo etching process chart,
(a)는 일반 공정도,(a) is a general process diagram,
(b)는 BED공정도.(b) BED process chart.
제2도는 반도체 사진 식각 공정중 현상과정에 대한 수직 단면도로서,2 is a vertical cross-sectional view of the development process during the semiconductor photo etching process,
(a)는 일반 공정의 현상과정,(a) is the development process of the general process,
(b)는 BED공정의 현상과정.(b) is the development process of the BED process.
제3도는 반도체 사진 식각 공정의 패턴 크기별 차이도로서,3 is a difference diagram according to pattern size in a semiconductor photo etching process.
(a)는 큰 패턴,(a) is a large pattern,
(b)는 작은 패턴.(b) a small pattern.
본 발명는 반도체 사진 식각방법에 관한 것으로, 특히 소프트 베이크 공정시 형성되는 감광액 표면의 각질화 현상을 제거하기 위해 현상액으로 감광액을 표면처리하는 노광전 현상(BEFORE-EXPOSURE-DEVELOP ; 이하 BED라 칭함) 공정을 추가한 반도체 사진 식각방법에 관한 것이다. 반도체 제조 공정시 고집적화로 급속히 진보됨에 따라 이에 부응하는 설비 또는 공정이 절실히 요구되고 있다. 그러나, 현재 광시스템(Optical System)의 성능이 한계에까지 왔다고 볼 수 있으므로 이의 극복을 위해 새로운 공정의 개발 및 적용이 불가결하게 되었다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor photolithography method, and in particular, a pre-exposure process (BEFORE-EXPOSURE-DEVELOP; hereinafter referred to as BED) to surface-treat the photoresist with a developer to remove keratinization on the surface of the photoresist formed during the soft bake process. It relates to an additional semiconductor photo etching method. As the semiconductor manufacturing process rapidly progresses to high integration, there is an urgent need for facilities or processes corresponding thereto. However, since the performance of the optical system has reached its limit, the development and application of a new process is indispensable.
특히, 사진 공정의 한계로는 해상력, 초점심도, 공정허용도 등의 열화가 문제가 되어 왔다.In particular, deterioration of resolution, depth of focus, process tolerance, etc. has become a problem as a limitation of the photographic process.
종래의 반도체 사진 식각 공정은 제1a도에 도시된 바와 같이 전처리 공정을 행한 후 반도체 웨이퍼 위에 감광액을 도포하고, 소프트 베이크 공정을 수행한다. 이어서, 마스크 정렬. 노광 공정을 수행하고, 노광공정후 베이크 공정을 수행하여 현상을 완료한다.In the conventional semiconductor photolithography process, as shown in FIG. 1A, after performing a pretreatment process, a photoresist is applied onto a semiconductor wafer and a soft bake process is performed. Then, mask alignment. The exposure process is performed, and a baking process is performed after the exposure process to complete development.
그러나, 웨이퍼 위에 감광액을 도포한 후 소프트 베이크 공정을 수행하면, 제2도(A5)의(K)처럼 각질화 현상이 발생하여 노광후 현상시에 현상초기의 현상속도를 감소시킨다.However, if the soft bake process is performed after the photoresist is applied onto the wafer, keratinization occurs as shown in (K) of FIG. 2 (A5) to reduce the initial development speed during post-exposure development.
따라서, 제2a도의 (L)(M)에서 처럼 패턴의 상부가 돌출되고, 패턴의 하부에 감광액 잔액이 남는 현상으로 인하여 사진 공정의 해상력 감소, 공정 안정도, 초점심도등이 작아져 제품의 신뢰성을 저하시키는 문제가 있었다.Therefore, as shown in (L) (M) of FIG. 2A, the upper part of the pattern protrudes and the photoresist balance remains at the lower part of the pattern, thereby reducing the resolution of the photographing process, the process stability, the depth of focus, and the like, thereby reducing the reliability of the product. There was a problem of deterioration.
따라서, 본 발명은 이와 같은 문제를 해결하기 위해 안출한 것으로, 소프트 베이크 공정후 노광전 현상액으로 감광액의 표면처리를 하는 BED 공정을 추가하여 감광액의 각질화 현상을 제거하도록 하는 반도체 사진 식각방법을 제공하는데 그 목적이 있다.Accordingly, the present invention has been made to solve such a problem, to provide a semiconductor photo etching method to remove the keratinization phenomenon of the photosensitive liquid by adding a BED process for the surface treatment of the photosensitive liquid with a pre-exposure developing solution after the soft baking process. The purpose is.
이하 제1b도에 도시된 본 발명의 공정도를 참조하여 본 발명의 실시예인 사진 식각 공정을 상세히 설명한다.Hereinafter, a photolithography process according to an embodiment of the present invention will be described in detail with reference to the process diagram of the present invention shown in FIG. 1B.
전처리 공정후 웨이퍼 위에 감광액을 도포하고, 소프트 베이크 공정을 수행하여 패턴의 서서히 마르도록 한 후 현상액으로 감광액 표면처리를 재차 수행한다. 이어서, 마스크 정렬. 노광 공정을 수행한 후 베이크 공정을 수행하여 현상을 완료한다.After the pretreatment process, the photoresist is applied onto the wafer, the pattern is gradually dried by performing a soft bake process, and the photoresist surface treatment is performed again with the developer. Then, mask alignment. After the exposure process is performed, a baking process is performed to complete development.
제2도 내지 제3도를 참조하여 본 발명의 작용효과를 상세히 설명한다.Referring to Figures 2 to 3 will be described in detail the operation and effect of the present invention.
제2도는 현상과정의 수직 단면도를 나타낸 것으로, (a)는 일반적인 현상과정이고, (b)는 BED의 현상 과정이다.Figure 2 shows a vertical cross-sectional view of the development process, (a) is a general development process, (b) is a development process of the BED.
현상초기(A1)(A2)에서 일반적인 현상공정(A1)이 BED 현상공정(B1)보다 매우 적게 현상되고, 현상이 진행되는 과정도 일반적인 현상공정(A2-A5)이 BED 현상공정(B2-B4)보다 늦으며 측면도 매끄럽지 못하다. 또한, 현상 완료상태(A6),(A5)의 경우에도 일반적인 현상공정(A6)에서는 감광액 상부 돌출부(L)가 생기고 하부에 감광액이 완전히 현상되지 않아 하부 잔유물(M)이 생긴다. 그러나 도면에서 보는 바와 같이 본 발명의 BED 현상 공정을 수행하는 경우 정확한 패턴이 형성됨을 알 수 있다. 그러므로 본 발명의 BED 공정(B5)이 매우 양호함을 나타낸다.In the initial stages of development (A1) and (A2), the general development process (A1) is developed much less than the BED development process (B1), and the development process is also performed in the general development process (A2-A5). It is later than) and its side is not smooth. In addition, in the case of the development completion states A6 and A5, in the general developing process A6, the photoresist upper protrusion L is generated, and the photoresist is not completely developed at the bottom, so the bottom residue M is generated. However, as shown in the figure, it can be seen that an accurate pattern is formed when the BED development process of the present invention is performed. It is therefore shown that the BED process (B5) of the present invention is very good.
제3도는 패턴의 크기별 효과를 나타낸 것으로, (a)는 큰 패턴의 효과를 나타내며, (b)는 작은 패턴의 효과를 나타낸다.Figure 3 shows the effect of the size of the pattern, (a) shows the effect of the large pattern, (b) shows the effect of the small pattern.
큰 패턴(a)도에서(A1)은 일반공정의 패턴이고(A2)는 BED 공정의 패턴이며, 작은 패턴(b)도에서(B1)은 일반공정의 패턴이고(B2)는 BED공정의 패턴이다.In the large pattern (a) (A1) is the pattern of the general process (A2) is the pattern of the BED process, in the small pattern (b) (B1) is the pattern of the general process (B2) is the pattern of the BED process to be.
일반공정의 큰 패턴(A1)은 감광액의 상하부 돌출, 잔유 현상이 있고, 작은 패턴(A2)의 경우에는 감광액의 상하부 돌출 및 잔유 현상이 더욱 심하게 발생되는 반면, BED 공정의 패턴(B1)(B2)은 패턴크기에 상관 없이 상하부에 돌출 및 잔유 현상이 발생하지 않는다.The large pattern A1 of the general process has the upper and lower protrusions and the residual oil phenomenon of the photosensitive liquid, and the small pattern A2 causes the upper and lower protrusions and the residual oil of the photosensitive liquid to be more severe, whereas the pattern B1 of the BED process (B2) ) Does not protrude or remain in the upper and lower parts regardless of the pattern size.
상술한 바와 같이 BED 공정을 추가함으로써 현상 초기의 현상속도를 증가시켜, 감광액이 각질화 현상을 방지하고, 이에 의해 감광액의 돌출 및 잔유 현상을 제거하여 해상력과 공정안정성, 공정허용도를 증가시킬 수 있어 제품의 신뢰성을 향상시키는 이점이 있다.As described above, by adding the BED process, the development speed at the beginning of the development is increased, and the photoresist can prevent keratinization, thereby removing the protruding and residual phenomenon of the photoresist, thereby increasing the resolution, process stability, and process tolerance. There is an advantage to improve the reliability of the product.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019880015770A KR910008836B1 (en) | 1988-11-29 | 1988-11-29 | Etching method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019880015770A KR910008836B1 (en) | 1988-11-29 | 1988-11-29 | Etching method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900008630A KR900008630A (en) | 1990-06-03 |
| KR910008836B1 true KR910008836B1 (en) | 1991-10-21 |
Family
ID=19279690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019880015770A KR910008836B1 (en) | 1988-11-29 | 1988-11-29 | Etching method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR910008836B1 (en) |
-
1988
- 1988-11-29 KR KR1019880015770A patent/KR910008836B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR900008630A (en) | 1990-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4396705A (en) | Pattern forming method and pattern forming apparatus using exposures in a liquid | |
| US7119025B2 (en) | Methods of eliminating pattern collapse on photoresist patterns | |
| JPS60231327A (en) | Method of forming resist pattern | |
| US7846623B2 (en) | Resist pattern and reflow technology | |
| KR100298609B1 (en) | Method for manufacturing photo mask having phase shift layer | |
| US4546066A (en) | Method for forming narrow images on semiconductor substrates | |
| US7662542B2 (en) | Pattern forming method and semiconductor device manufacturing method | |
| JP3288884B2 (en) | Method of forming resist pattern | |
| GB2135793A (en) | Bilevel ultraviolet resist system for patterning substrates of high reflectivity | |
| KR0140472B1 (en) | Method for forming a photoresist pattern | |
| KR910008836B1 (en) | Etching method of semiconductor device | |
| TW201824349A (en) | Method for lithography patterning | |
| JP2001297997A (en) | Method of manufacturing semiconductor device | |
| JP2005221801A (en) | Resist pattern forming method | |
| JPH06338452A (en) | Formation method of resist pattern | |
| KR100516747B1 (en) | Micro pattern formation method of semiconductor device | |
| KR100209366B1 (en) | Method for forming minute pattern of semiconductor device | |
| KR970008268B1 (en) | Micro pattern formation of photoresist film | |
| KR0133830B1 (en) | Photo lithography by e-beam | |
| KR100198599B1 (en) | Alligning method for semiconductor device fabrication | |
| KR0179339B1 (en) | Method of forming photoresist pattern | |
| KR20010063481A (en) | Method of forming a submicro pattern in a semiconductor device | |
| KR0171985B1 (en) | Photosensitive film pattern forming method of semiconductor equipment | |
| KR20080106696A (en) | A manufacturing method using a top coating pattern as a supplementary etching mask | |
| KR970008269B1 (en) | Micro pattern formation of semiconductor elements |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| G160 | Decision to publish patent application | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20010906 Year of fee payment: 11 |
|
| LAPS | Lapse due to unpaid annual fee |