KR910008525B1 - Picture signal processing method for fax - Google Patents

Abstract

Image signals of dither circuit (6) in data selector (7) is outputted by system control part (8), if output signal value of VCR (14) is greater than that of VSCR (13) and less than that of VECR (5), that of HCR (17) is greater than that of HSCR (16) and less than that of HECR (18). Image signals of a binary changing circuit (5) in data selector (7) is outputted by system control part (5) otherwise. This treating makes a good image quality.

Description

Call Signal Processing in Facsimile

1 is a block diagram of an apparatus for explaining the operation of the present invention.

2 is a detailed circuit diagram of the partial desensitization circuit 9 in FIG.

Figure 3 is an exemplary embodiment employing the method of the present invention is divided into four parts in the sub-scanning direction, divided into two in the main scanning direction.

4 is a block diagram for explaining the operation relationship of the present invention.

* Explanation of symbols for main parts of the drawings

1: Original 2: Light source

3: lens 4: photoelectric converter

5: binarization circuit 6: dether circuit

7: data selector 8: system control unit

9: partial desensitization circuit 10: coding circuit

11 modulation circuit 12 transmission path

13: Vertical Start Line Constant Register (VSCR)

14: Vertical Count Register (VCR)

15: Vertical end line constant register (VECR)

16: Horizontal Start Bit Constant Register (HSCR)

17: Horizontal Count Register (HCR)

18: Horizontal end bit constant register (HECR)

19: first comparator 20: second comparator

21: 3rd comparator 22: 4th comparator

23, 24: Oagate

The present invention relates to a speech signal processing method that enables dither processing on a specific portion of a facsimile manuscript.

The conventional facsimile apparatus has a problem in that the image quality is deteriorated because it does not adopt a method of reprocessing a manuscript in which a photograph or a dot image and a general character are mixed.

In order to solve the above-mentioned problems, the present invention selects a portion to be dethered from a photo, a halftone image, and a general character by a block pattern in which blocks are blocked in the main and sub-scanning directions. Invented to improve the image quality as the process is performed, which will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a device according to the operating relationship of the present invention. As shown therein, a signal read out from an original 1 by a light source 2 is converted into an electrical signal in a photoelectric converter 4. The binary selector 5 and the desser circuit 6 are respectively applied to the data selector 7, and the output signal of the partial desensitization circuit 9 is inputted from the system controller 8 to receive the data selector 7. Under the control, the output signals of the binarization circuit 5 and the dether circuit 6 are selected and then transmitted to the transmission path 12 through the encoding circuit 10 and the modulation circuit 11.

FIG. 2 is a detailed circuit diagram of the partial desistor detection circuit 9 of FIG. 1, and as shown therein, the output signals of the vertical time line constant register 13 and the vertical end line constant register 15 are vertical counter registers 14. After comparing the output signal from the comparator (19) and (20) respectively, it is applied to one input terminal of the oragate (23), (24), the horizontal start bit constant register (16) and the horizontal end bit constant register ( The output signal of 18 is compared with the output signal of the horizontal count register 17 by the comparators 21 and 22, and then applied to the other input terminals of the oragate 23 and 24, and this oragate The output signal of (23) and (24) is comprised so that it may be applied to the said system control part 8.

When described in detail with reference to Figure 3 and Figure 4 the effects of the present invention configured as described above.

The sub-scans of the specific portion to be treated by dither, that is, the values of the start line and the end line in the vertical direction, are stored in the vertical start line constant register 13 and the vertical end line constant register 15, The main scan, that is, the values of the start bit and the end bit in the horizontal direction are stored in the horizontal start bit constant register 16 and the horizontal end bit constant register 18. On the other hand, the vertical count register 14 and the horizontal count register 17 each count the current scanned lines and bits.

The logic of the outputs of the comparators 19, 20, 21, and 22 is as follows.

VSCR이면 제1비교기(19)의 출력은 0, 그 이외에서의 출력은 1이고, VCR〈VECR이면 제2비교기(20)의 출력은 0, 그 이외에서의 출력은 1이고, HCR

HSCR이면 제3비교기(21)의 출력은 0, 그 이외의 출력은 1이고, HCR〈HECR이면 제4비교기(22)의 출력은 0, 그 이외의 출력은 1이다.VCR

In case of VSCR, the output of the first comparator 19 is 0, otherwise, the output of the first comparator 19 is 0. In case of VCR < VECR, the output of the second comparator 20 is 0, the output of the other comparator 20 is 1, and the HCR

If it is HSCR, the output of the third comparator 21 is 0, and the other output is 1, and if the HCR < HECR, the output of the fourth comparator 22 is 0, and the other output is 1.

The output signals of the comparator output by the logic operation as described above are input to the two input terminals of the oragate 23 and 24 and are output to the system controller 8.

As a result, when the output signal value of the vertical counter register 14 is greater than the output signal value of the vertical start line constant register 13 and smaller than the output signal value of the vertical end line constant register 15, the comparators 19 and 20 are used. When the low potential signal is outputted at all, and the output signal value of the horizontal count register 17 is greater than and smaller than the output signal value of the horizontal start bit constant register 16, the low potential signal is output from both the comparators 21 and 22. As a result, a low potential signal is output from the oragate 23 and 24 and is applied to the system controller 8.

As such, when the low potential signal is applied to both input terminals of the system controller 8, the system controller 8 controls the data selector 7 to select the output signal of the dether circuit 6. The system control unit 8 controls the data selector to select the output signal of the binarization circuit 5.

Fig. 3 shows one embodiment thereof, which shows a case of dividing into four in the sub-scanning direction and dividing into two in the main-scanning direction.

As described above, according to the present invention, since the image signal processing is performed by selecting a portion desired for dither processing in a document mixed with a photo or a dot image and a general character by block patterns blocked in the main and sub-scanning directions. The effect can be improved.

Claims (1)

The output signal value of the vertical counter register 14 is larger than the output signal value of the vertical start line constant register 13 and smaller than the output signal value of the vertical end line constant register 15 and the output signal of the horizontal counter register 17. Only when the value is larger than the output signal value of the horizontal start bit constant register 16 and smaller than the output signal value of the horizontal end bit constant register 18, the deselector circuit in the data selector 7 is controlled by the control of the system controller 8. In the facsimile machine characterized in that the output signal of 6) is selected and outputted, and the output signal of the binarization circuit 5 is selected and output from the data selector 7 under the control of the system controller 8 except for the above case. Signal processing method.

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